Idle

Unlike the SAM D series there is only one Idle (IDLE) sleep mode in SAM L21. In this mode the CPU clock is switched off. The default state of the synchronous AHBx and APBx clocks is off but they can be enabled if requested by peripherals. E.g. if the DMA receives a transfer trigger it will request a clock signal and start to transfer. By default, the asynchronous Generic Clocks (GCLK_PERIPH) runs in IDLE. Writing the On Demand bit for a clock source to one (XOSCCTRL/OSC16MCTRL/XOSC32K/OSC32K.ONDEMAND written to one) will override this default setting, ensuring GCLK_PERIPH only propagates to a peripheral when requested. IDLE is entered by executing the Wait For Interrupt (WFI) instruction with IDLE written to the Sleep Mode bit group in the Sleep Configuration register (SLEEPCFG.SLEEPMODE written to 0x2). The device will exit IDLE when it detects any non-masked interrupt.

Note: Some of the oscillators have a long startup time, such as the XOSC32K. Having this oscillator running on demand will introduce a delay before the clock is available to the demanding peripheral when turned off.