Testing the CFD Without Influencing the Main Clock

This mode is intended to use run-time. To not influence the main clock when writing to the Clock Failure Detection Test (CFDTST) bit in the Main Clock Control C (CLKCTRL.MCLKCTRLC) register, the Clock Failure Detection Source (CFDSRC) bit in CLKCTRL.MCLKCTRLC must be configured to a clock source different than the main clock. CFDSRC must be different from ‘0’. The CFD interrupt flag in the Main Clock Interrupt Flags (CLKCTRL.MCLKINTFLAGS) register will be set, but the main clock will not change to the start-up clock source.

If the clock failure detector is monitoring the main clock and a run-time check of the clock failure detector is needed, it is necessary to do the following steps:
  1. 1.Disable the clock failure detector by writing a ‘0’ to the Clock Failure Detection Enable (CFDEN) bit in CLKCTRL.MCLKCTRLC, and change the source to the oscillator directly by writing a number other than a ‘0’ to the CFDSRC bit.
  2. 2.Write a ‘1’ to the CFD interrupt flag in CLKCTRL.MCLKINTFLAGS to clear the flag.
  3. 3. Write a ‘1’ to the CFDTST bit and enable the clock failure detector again by writing a ‘1’ to the CFDEN bit.
  4. 4.Wait for the CFD bit in CLKCTRL.MCLKINTFLAGS to be set to check that the clock failure works.
  5. 5.Disable the clock failure detector by writing a ‘0’ to the CFDEN bit and changing the source to the main clock again by writing a ‘0’ to the CFDSRC bit.
  6. 6.Enable the clock failure detector again by writing a ‘1’ to the CFDEN bit and writing a ‘0’ to the CFDTST bit.