When writing serial
data to the ATmega8A, data is clocked
on the rising edge of SCK.
When reading data
from the ATmega8A, data is clocked on
the falling edge of SCK. Please refer to the figure “Serial
Programming Waveforms” in the related links for timing details.
To program and verify
the ATmega8A in the serial programming
mode, the following sequence is recommended, see also table “Serial
Programming Instruction Set” in the related links:
- 1. Power-up sequence:
Apply power between VCC and GND while RESET and SCK are set to
“0”. In some systems, the programmer can not guarantee that SCK is held low
during power-up. In this case, RESET must be given a
positive pulse of at least two CPU clock cycles duration after SCK has been set
to “0”.
- 2.Wait for at least 20ms and enable
serial programming by sending the Programming Enable serial instruction to pin
MOSI.
- 3.The serial programming instructions
will not work if the communication is out of synchronization. When in sync. the
second byte (0x53), will echo back when issuing the third byte of the Programming
Enable instruction. Whether the echo is correct or not, all four bytes of the
instruction must be transmitted. If the 0x53 did not echo back, give
RESET a positive pulse and issue a new Programming
Enable command.
- 4.The Flash is programmed one page at
a time. The memory page is loaded one byte at a time by supplying the 6 LSB of the
address and data together with the Load Program Memory Page instruction. To ensure
correct loading of the page, the data low byte must be loaded before data high byte
is applied for a given address. The Program Memory Page is stored by loading the
Write Program Memory Page instruction with the 8 MSB of the address. If polling is
not used, the user must wait at least tWD_FLASH before issuing the next page.
- 5.Note: If other commands than polling (read) are applied before any write operation
(FLASH, EEPROM, Lock Bits, Fuses) is completed, it may result in incorrect
programming.
- 6.The EEPROM array is programmed one
byte at a time by supplying the address and data together with the appropriate Write
instruction. An EEPROM memory location is first automatically erased before new data
is written. If polling is not used, the user must wait at least tWD_EEPROM before issuing
the next byte. In a chip erased device, no 0xFFs in the data file(s) need to be
programmed.
- 7.Any memory location can be verified
by using the Read instruction which returns the content at the selected address at
serial output MISO.
- 8.At the end of the programming
session, RESET can be set high to commence normal
operation.
- 9.Power-off sequence (if needed):
Set RESET to “1”.
Turn
VCC power
off.