7-bit Reception with AHEN and DHEN

Slave device reception with AHEN and DHEN set operate the same as without these options with extra interrupts and clock stretching added after the eighth falling edge of SCL. These additional interrupts allow the slave software to decide whether it wants to ACK the receive address or data byte, rather than the hardware. This functionality adds support for PMBusā„¢ that was not present on previous versions of this module.

This list describes the steps that need to be taken by slave software to use these options for I2C communication. Figure 3 displays a module using both address and data holding. Figure 4 includes the operation with the SEN bit of the SSPxCON2 register set.

  1. 1.S bit is set; SSPxIF is set if interrupt on Start detect is enabled.
  2. 2.Matching address with R/W bit clear is clocked in. SSPxIF is set and CKP cleared after the eighth falling edge of SCL.
  3. 3.Slave clears the SSPxIF.
  4. 4.Slave can look at the ACKTIM bit to determine if the SSPxIF was after or before the ACK.
  5. 5.Slave reads the address value from SSPxBUF, clearing the BF flag.
  6. 6.Slave sets ACK value clocked out to the master by setting ACKDT.
  7. 7.Slave releases the clock by setting CKP.
  8. 8.SSPxIF is set after an ACK, not after a NACK.
  9. 9.If SEN = 1, the slave hardware will stretch the clock after the ACK.
  10. 10.Slave clears SSPxIF.
    Important: SSPxIF is still set after the ninth falling edge of SCL even if there is no clock stretching and BF has been cleared. Only if NACK is sent to master is SSPxIF not set
  11. 11.SSPxIF set and CKP cleared after eighth falling edge of SCL for a received data byte.
  12. 12.Slave looks at ACKTIM bit to determine the source of the interrupt.
  13. 13.Slave reads the received data from SSPxBUF clearing BF.
  14. 14.Steps 7-14 are the same for each received data byte.
  15. 15.Communication is ended by either the slave sending an ACK = 1, or the master sending a Stop condition. If a Stop is sent and Interrupt on Stop Detect is disabled, the slave will only know by polling the P bit.
    Figure 1. I2C Slave, 7-bit Address, Reception (SEN = 0, AHEN = 0, DHEN = 0)
    Figure 2. I2C Slave, 7-bit Address, Reception (SEN = 1, AHEN = 0, DHEN = 0)
    Figure 3. I2C Slave, 7-bit Address, Reception (SEN = 0, AHEN = 1, DHEN = 1)
    Figure 4. I2C Slave, 7-bit Address, Reception (SEN = 1, AHEN = 1, DHEN = 1)