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Highly Integrated Wireless MCU with CAN FD, Ethernet, USB, Motor Control, Graphics, Touch and Enhanced Security
Introduction
PIC32CX-BZ6 SoC Family Features
PIC32WM-BZ6 Module Features
1 Acronyms and Abbreviations
2 Ordering Information
2.1 PIC32CX-BZ6 SoC Ordering Information
2.2 PIC32WM-BZ6 Module Ordering Information
3 Configuration Summary
4 PIC32CX-BZ6 SoC Description
4.1 PIC32CX-BZ6 SoC Block Diagram
5 PIC32WM-BZ6 Module Description
5.1 Basic Connection Requirement
5.2 PIC32WM-BZ6 Module Placement Guidelines
5.3 PIC32WM-BZ6 Module Routing Guidelines
5.4 PIC32WM-BZ6 Module RF Considerations
5.5 PIC32WM-BZ6 Module Antenna Considerations
5.6 PIC32WM-BZ6 Module Reflow Profile Information
5.7 PIC32WM-BZ6 Module Assembly Considerations
6 Pinout and Signal Descriptions List
7 I/O Ports and Peripheral Pin Select (PPS)
7.1 Overview
7.2 Features
7.3 Block Diagram
7.4 Parallel I/O (PIO) Ports
7.5 Peripheral Pin Select (PPS)
7.6 Peripheral Multiplexing
7.7 Function Priority for Device Pins
7.8 Operation in Power Saving Modes
7.9 Results of Various Resets
7.10 Port Register Summary
7.11 Register Description
7.12 Peripheral Pin Select (PPS) Input Mapping Register Summary
7.13 Peripheral Pin Select (PPS) Output Mapping Register Summary
7.14 Register Description
8 Power Subsystem
8.1 Block Diagram
8.2 VDD Voltage Domain Overview
8.3 VDD-AON Power Domain Overview
8.4 VDDBKUPCORE Power Domain
8.5 PMU Controller
8.6 Voltage Regulators
8.7 Power Supply Modes
8.8 Typical Power Supply Connection for SoC
8.9 Typical Power Supply Connection for PIC32WM-BZ6 Module
8.10 Power-Up Sequence
9 Product Memory Mapping Overview
9.1 Embedded Memories
9.2 Physical Memory Map
9.3 Boot ROM
9.4 Flash Memory Parameters
9.5 eFuse Memory
9.6 SRAM Memory Configuration
9.7 Boot Flash Device Configuration Word
9.8 Boot Flash Code Protection Register
Boot Flash Code Protection Register
10 Processor and Architecture
10.1 Cortex-M4 Processor
10.2 Nested Vector Interrupt Controller (NVIC)
10.3 High-Speed Bus System
11 Prefetch Cache (PCHE)
11.1 Overview
11.2 Features
11.3 Block Diagram
11.4 Product Dependencies
11.5 Prefetch Behavior
11.6 Configurations
11.7 Predictive Prefetch Behavior
11.8 Coherency Support
11.9 Effects of Reset
11.10 Error Conditions
11.11 Register Summary
11.12 Register Description
12 Cortex M Cache Controller (CMCC)
12.1 Overview
12.2 Features
12.3 Block Diagram
12.4 Signal Description
12.5 Product Dependencies
12.6 Functional Description
12.7 RAM Properties
12.8 Register Summary
12.9 Register Description
13 Secure Boot ROM
13.1 Overview
13.2 Features
13.3 Functional Description
13.4 Register Summary
13.5 Register Description
13.6 Application Transition
14 eFuse Controller
14.1 Overview
14.2 Hardware Mode
14.3 eFuse Programming
14.4 eFuse Auto-Loading
14.5 Security Keys
14.6 Counters
14.7 Register Summary
14.8 Register Description
15 Security Features
15.1 Overview
15.2 Features
15.3 Reference Documentation
15.4 Interface
15.5 Description
15.6 Register Summary
15.7 Register Description
16 Flash Controller (FC)
16.1 Overview
16.2 Features
16.3 Functional Block Diagram
16.4 Product Dependencies
16.5 Flash Memory Addressing
16.6 Memory Configuration
16.7 Boot Flash Memory (BFM) Partitions
16.8 Program Flash Memory (PFM) Partitions
16.9 Error Correcting Code (ECC) and Flash Programming
16.10 Interrupts
16.11 Error Detection
16.12 NVMKEY Register Unlocking Sequence
16.13 DWord Programming
16.14 Quad Double Word Programming
16.15 Row Programming
16.16 Page Erase
16.17 Program Flash Memory (PFM) Erase
16.18 Device Code Protection Bit (CP)
16.19 Effects of Various Resets
16.20 Register Summary
16.21 Register Description
17 Device Service Unit (DSU)
17.1 Overview
17.2 Features
17.3 DSU Block Diagram
17.4 Signal Description
17.5 Product Dependencies
17.6 Debug Operation
17.7 Chip Erase
17.8 Programming
17.9 Intellectual Property Protection
17.10 Device Identification
17.11 Functional Description
17.12 Register Summary
17.13 Register Description
18 Clock and Reset Unit (CRU)
18.1 Overview
18.2 Features
18.3 Clock System
18.4 Resets
18.5 Register Summary
18.6 Register Description
19 Power Management Unit (PMU)
19.1 Overview
19.2 Features
19.3 Functional Description
19.4 Register Summary
19.5 Register Description
19.6 Register Summary
19.7 Register Description
20 Watchdog Timer (WDT)
20.1 Overview
20.2 Features
20.3 Block Diagram
20.4 Watchdog Timer Operation
20.5 Interrupt and Reset Generation
20.6 Operation in Debug and Power-Saving Modes
20.7 Effects of Various Resets
20.8 Register Summary
20.9 Register Description
21 Deadman Timer (DMT)
21.1 Overview
21.2 Features
21.3 Block Diagram
21.4 DMT Operation
21.5 Register Summary
21.6 Register Description
22 RAM Error Correction Code (RAMECC)
22.1 Overview
22.2 Features
22.3 Block Diagram
22.4 Signal Description
22.5 Product Dependencies
22.6 Functional Description
22.7 Register Summary
22.8 Register Description
23 System Configuration and Register Locking (CFG)
23.1 Overview
23.2 Features
23.3 Modes of Operation
23.4 Locking and Unlocking the System Configuration Registers
23.5 NMI Events
23.6 Register Locking
23.7 Effects of Various Resets
23.8 Register Summary
23.9 Register Description
24 Peripheral Module Disable (PMD)
24.1 Overview
24.2 Enabling Peripherals
24.3 Controlling Configuration Changes
24.4 PMD Register Summary
24.5 Register Description
25 Peripheral Access Controller (PAC)
25.1 Overview
25.2 Features
25.3 Block Diagram
25.4 Product Dependencies
25.5 Functional Description
25.6 Register Summary
25.7 Register Description
26 Real-Time Counter and Calendar (RTCC)
26.1 Overview
26.2 Features
26.3 Block Diagram
26.4 Signal Description
26.5 Product Dependencies
26.6 Functional Description
26.7 Register Summary - Mode 0 - 32-Bit Counter
26.8 Register Description - Mode 0 - 32-Bit Counter
26.9 Register Summary - Mode 1 - 16-Bit Counter
26.10 Register Description - Mode 1 - 16-Bit Counter
26.11 Register Summary - Mode 2 - Clock/Calendar
26.12 Register Description - Mode 2 - Clock/Calendar
27 Direct Memory Access Controller (DMAC)
27.1 Overview
27.2 Features
27.3 Block Diagram
27.4 Signal Description
27.5 Product Dependencies
27.6 Functional Description
27.7 Register Summary
27.8 Register Description
27.9 Register Summary - SRAM
27.10 Register Description - SRAM
28 External Interrupt Controller (EIC)
28.1 Overview
28.2 Features
28.3 Block Diagram
28.4 Signal Description
28.5 Product Dependencies
28.6 Functional Description
28.7 Register Summary
28.8 Register Description
29 Configurable Custom Logic (CCL)
29.1 Overview
29.2 Features
29.3 Block Diagram
29.4 Signal Description
29.5 Product Dependencies
29.6 Functional Description
29.7 Register Summary
29.8 Register Description
30 Frequency Meter (FREQM)
30.1 Overview
30.2 Features
30.3 Block Diagram
30.4 Signal Description
30.5 Product Dependencies
30.6 Functional Description
30.7 Register Summary
30.8 Register Description
31 Event System (EVSYS)
31.1 Overview
31.2 Features
31.3 Block Diagram
31.4 Product Dependencies
31.5 Functional Description
31.6 Register Summary
31.7 Register Description
32 Serial Communication Interface (SERCOM)
32.1 Overview
32.2 Features
32.3 Block Diagram
32.4 Signal Description
32.5 Product Dependencies
32.6 Functional Description
33 SERCOM Synchronous and Asynchronous Receiver and Transmitter (SERCOM USART)
33.1 Overview
33.2 USART Features
33.3 Block Diagram
33.4 Signal Description
33.5 Product Dependencies
33.6 Functional Description
33.7 Register Summary
33.8 Register Description
34 SERCOM Serial Peripheral Interface (SERCOM SPI)
34.1 Overview
34.2 Features
34.3 Block Diagram
34.4 Signal Description
34.5 Product Dependencies
34.6 Functional Description
34.7 Register Summary
34.8 Register Description
35 SERCOM Inter-Integrated Circuit (SERCOM I2C)
35.1 Overview
35.2 Features
35.3 Block Diagram
35.4 Signal Description
35.5 Product Dependencies
35.6 Functional Description
35.7 Register Summary - I2C Client
35.8 Register Description - I2C Client
35.9 Register Summary - I2C Host
35.10 Register Description - I2C Host
36 Quad Serial Peripheral Interface (QSPI)
36.1 Overview
36.2 Features
36.3 Block Diagram
36.4 Signal Description
36.5 Product Dependencies
36.6 Functional Description
36.7 Register Summary
36.8 Register Description
37 Analog-to-Digital Converter (ADC)
37.1 Overview
37.2 Features
37.3 Block Diagram
37.4 ADC Operation
37.5 ADC Core Configuration
37.6 Additional ADC Functions
37.7 Interrupts
37.8 Power-Saving Modes of Operation
37.9 Effects of Reset
37.10 Transfer Function
37.11 ADC Sampling Requirements
37.12 Register Summary
37.13 Register Description
38 Automated Touch Sensing using the Enhance Capacitive Voltage Divider (CVD)
38.1 Overview
38.2 Features
38.3 Configuration
38.4 Block Diagram
38.5 CVD Module Operation
38.6 Register Summary
38.7 Register Description
39 Analog Comparators (AC)
39.1 Overview
39.2 Features
39.3 Block Diagram
39.4 Product Dependencies
39.5 Functional Description
39.6 Register Summary
39.7 Register Description
40 Digital-to-Analog Converter (DAC)
40.1 Overview
40.2 Features
40.3 Block Diagram
40.4 DAC Timing Diagram
40.5 Functional Description
40.6 Register Summary
41 Timer/Counter (TC)
41.1 Overview
41.2 Features
41.3 Block Diagram
41.4 Signal Description
41.5 Product Dependencies
41.6 Functional Description
41.7 Register Summary - 8-bit Mode
41.8 Register Description - 8-Bit Mode
41.9 Register Summary - 16-bit Mode
41.10 Register Description - 16-Bit Mode
41.11 Register Summary - 32-bit Mode
41.12 Register Description - 32-Bit Mode
42 Timer/Counter for Control Applications (TCC)
42.1 Overview
42.2 Features
42.3 Block Diagram
42.4 Signal Description
42.5 Product Dependencies
42.6 Functional Description
42.7 Register Summary
42.8 Register Description
43 Controller Area Network (CAN)
43.1 Overview
43.2 Features
43.3 Block Diagram
43.4 Signal Description
43.5 Peripheral Dependencies
43.6 Functional Description
43.7 Register Summary
44 Universal Serial Bus (USB)
44.1 Overview
44.2 Features
44.3 Block Diagram
44.4 USB OTG Control Registers
45 Ethernet Media Access Controller (ETH)
45.1 Overview
45.2 Features
45.3 Block Diagram
45.4 Signal Interface
45.5 Functional Description
45.6 Programming Interface
45.7 Register Summary
46 Quadrature Encoder Interface (QEI)
46.1 Overview
46.2 Features
46.3 Block Diagram
46.4 Module Description
46.5 QEI Operation in Power-Saving Modes
46.6 QEI Registers
47 Low-Cost Controllerless (LCC)
48 802.15.4 Bluetooth® Radio Subsystem
48.1 Overview
48.2 Features
48.3 Wireless Subsystem Top Level Diagram
48.4 Analog RF Front-End
48.5 Digital Front-end
48.6 Bluetooth Low Energy Link Controller
48.7 802.15.4 Subsystem
48.8 Radio Arbiter
48.9 Register Banks
48.10 Coexistence Interface
49 Electrical Characteristics
49.1 Absolute Maximum Ratings
49.2 DC Electrical Characteristics
49.3 Thermal Specifications
49.4 Power Supply DC Module Electrical Specifications
49.5 Active Current Consumption DC Electrical Specifications
49.6 Idle Current Consumption DC Electrical Specifications
49.7 Standby/Sleep Current Consumption DC Electrical Specifications
49.8 Deep Sleep Current Consumption DC Electrical Specifications
49.9 XDS (Extreme Deep Sleep) Current Consumption DC Electrical Specifications
49.10 Wake-Up Timing from Low Power Modes AC Electrical Specifications
49.11 I/O Pin AC/DC Electrical Specifications
49.12 Maximum Clock Frequencies Electrical Specifications
49.13 External XTAL and Clock (POSC) AC Electrical Specifications
49.14 XOSC32 (SOSC) AC Electrical Specifications
49.15 Low Power Internal 32 kHz RC Oscillator AC Electrical Specifications
49.16 FRC AC Electrical Specifications
49.17 RFPLL (RF/System Phase Locked Loop) AC Electrical Specifications
49.18 DAC Module Electrical Specifications
49.19 ADC Electrical Specifications
49.20 Analog Comparator AC Electrical Specifications
49.21 SPI Module Electrical Specifications
49.22 UART AC Electrical Specifications
49.23 I2C Module Electrical Specifications
49.24 QSPI Module Electrical Specifications
49.25 CANx Module AC Electrical Specifications
49.26 TCx Timer Capture Module AC Electrical Specifications
49.27 TCCx Timer Capture Module AC Electrical Specifications
49.28 USB AC Electrical Specifications
49.29 FLASH NVM AC Electrical Specifications
49.30 GMAC Electrical Specifications
49.31 Frequency Meter AC Electrical Specifications
49.32 Quadrature Encoder Interface AC Electrical Specifications
49.33 SWD Two-Wire AC Electrical Specifications
49.34 Bluetooth Low Energy RF Characteristics
49.35 802.15.4 RF Characteristics
50 Packaging Information
50.1 PIC32CX-BZ6 SoC Packaging Information
50.2 PIC32WM-BZ6 Module Packaging Information
51 Appendix A: Regulatory Approval
51.1 United States
51.2 Canada
51.3 Europe
51.4 UKCA (UK Conformity Assessed)
51.5 Other Regulatory Information
52 Appendix B: Acronyms and Abbreviations
53 Document Revision History
Microchip Information
Trademarks
Legal Notice
Microchip Devices Code Protection Feature