Silicon Issue Summary

Erratum is not applicable.
Erratum is applicable.
Peripheral Short Description Valid for Silicon Revision
Rev. A
Device Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic Loading of Calibration Values X
ADC One Extra Measurement Performed After Disabling ADC Free-Running Mode X
Pending Event Stuck When Disabling the ADC X
ADC Performance Degrades with CLKADC Above 1.5 MHz and VDD < 2.7V X
ADC Functionality Cannot be Ensured with CLKADC Above 1.5 MHz and a Setting of 25% Duty Cycle X
CCL Connecting LUTs in Linked Mode Requires OUTEN Set to ‘1’ X
D-latch is Not Functional X
The CCL Must be Disabled to Change the Configuration of a Single LUT X
RTC Disabling the RTC Stops the PIT X
Any Write to the RTC.CTRLA Register Resets the RTC and PIT Prescaler X
TCA Restart Will Reset Counter Direction in NORMAL and FRQ Mode X
TCB The TCA Restart Command Does Not Force a Restart of TCB X
Minimum Event Duration Must Exceed the Selected Clock Period X
CCMP and CNT Registers Operate as 16-Bit Registers in 8-Bit PWM Mode X
USART TXD Pin Override Not Released When Disabling the Transmitter X
Open-Drain Mode Does Not Work When TXD is Configured as Output X
Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode X