Crypto Fabric Mode (For PolarFire SoC FPGA Only)

When in fabric mode, the Cryptoprocessor is dedicated to Fabric and in this mode:

  1. 1.The Cryptoprocessor must be clocked from the Fabric and the maximum supported frequency is 
200 MHz. The Cryptoprocessor includes a DLL, which needs to be enabled if the Cryptoprocessor clock frequency is greater than or equal to 125 MHz. If the embedded DLL is not enabled, the maximum frequency is limited to 70 MHz.
  2. 2.The Cryptoprocessor is accessible from Fabric through AHB master and slave interfaces using FIC4 (Fabric interface controller). A soft processor is needed in the FPGA fabric to access the Cryptoprocessor using CAL driver..
  3. 3.The Cryptoprocessor control inputs (GO, PURGE etc.) are directly controllable from Fabric ports.
  4. 4.No master HBURST connectivity to the fabric. If user logic uses HBURST, it should be tied to 3'b001 in the Fabric design.
  5. 5.No master HPROT support is provided. If user logic uses HPROT, it should be tied off to a suitable value.