PPS Inputs

Each digital peripheral has a dedicated PPS Peripheral Input Selection (xxxPPS) register with which the input pin to the peripheral is selected. Devices that have 20 leads or less (8/14/16/20) allow PPS routing to any I/O pin, while devices with 28 leads or more allow PPS routing to I/Os contained within two ports (see the table below).

Important: The notation “xxx” in the generic register name is a placeholder for the peripheral identifier. For example, xxx = T0CKI for the T0CKIPPS register.

Multiple peripherals can operate from the same source simultaneously. Port reads always return the pin level regardless of peripheral PPS selection. If a pin also has analog functions associated, the ANSEL bit for that pin must be cleared to enable the digital input buffer.

Table 1. PPS Input Selection Table
Peripheral	PPS Input Register	Default Pin Selection at POR
Peripheral	PPS Input Register	8-Pin Devices	14/16-Pin Devices	20-Pin Devices
External Interrupt	INTPPS	RA2
Timer0 Clock	T0CKIPPS	RA2
Timer1 Clock	T1CKIPPS	RA5
Timer1 Gate	T1GPPS	RA4
Timer2 Input	T2INPPS	RA5
CCP1	CCP1PPS	RA5	RC5	RC5
CCP2	CCP2PPS	RA5	RC3	RC3
SCL1/SCK1	SSP1CLKPPS⁽¹⁾	RA1	RC0	RB4
SDA1/SDI1	SSP1DATPPS⁽¹⁾	RA2	RC1	RB6
SS1	SSP1SSPPS	RA3	RC3	RC6
RX1/DT1	RX1PPS	RA1	RC5	RB5
CK1	CK1PPS	RA0	RC4	RB7
ADC Conversion Trigger	ADACTPPS	RA5	RC2	RC2

Note:

1.Bidirectional pin. The corresponding output must select the same pin.