Programmable SDA Hold Time

The stand-alone I2C module has three SDA hold time selections (30, 100, or 300 ns), which are selected via the SDA Hold Time Selection (SDAHT) bits. The hold time is the time the SDA signal is held valid after the falling edge of SCL. Additional hold time may be useful for buses with higher bus capacitance. The MSSP module has two SDA hold time selections – 100 or 300 ns.