2.2.1 Multiple High Voltage Pulses in Series can Force Pin PF7 to Remain in UPDI Configuration
If applying multiple high voltage pulses to the Reset pin within a 100 ms timeframe, pin PF7 will remain as a UPDI pin even if no UPDI key is given.
If PF7 is configured as GPIO pin (UPDIPINCFG is '0' in FUSE.SYSCFG0), it will only return to GPIO mode after a Reset is issued by either POR or BOD.
Work Around
None.
Affected Silicon Revisions
Rev. A1
Rev. A2
Rev. A3
X
X
X
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