43.3 ADC Acquisition Requirements

For the ADC to meet its specified accuracy, the charge holding capacitor (C_HOLD) must be allowed to fully charge to the input channel voltage level. The analog input model is shown in Figure 43-4. The source impedance (R_S) and the internal sampling switch (R_SS) impedance directly affect the time required to charge the capacitor C_HOLD. The sampling switch (R_SS) impedance varies over the device voltage (V_DD). The maximum recommended impedance for analog sources is 10 kΩ. As the source impedance is decreased, the acquisition time may be decreased. After the analog input channel is selected (or changed), an ADC acquisition time must be completed before the conversion can be started. To calculate the minimum acquisition time, Equation 43-1 may be used. This equation assumes an error of 1/2 LSb. The 1/2 LSb error is the maximum error allowed for the ADC to meet its specified resolution.

Assumptions: Temperature = 50°C; External impedance = 10 kΩ; V_DD = 5.0V

T_ACQ = Amplifier Settling Time + Hold Capacitor Charging Time + Temperature Coefficient

$T_{ACQ}=T_{AMP}+T_C+T_{COFF}$

$T_{ACQ}=2\mu s+T_C+\left[\right(Temperature-25°C\left)\right(0.05\mu s/°C\left)\right]$

The value for T_C can be approximated with the following equations:

$V_{APPLIED}(1-\frac{1}{\left(2^{n+1}\right)-1})=V_{CHOLD}$ ; [1] V_CHOLD charged to within ½ lsb

$V_{APPLIED}(1-e^{\frac{-T_C}{RC}})=V_{CHOLD}$ ; [2] V_CHOLD charge response to V_APPLIED

$V_{APPLIED}(1-e^{\frac{-T_C}{RC}})=V_{APPLIED}(1-\frac{1}{\left(2^{n+1}\right)-1})$ ; Combining [1] and [2]

Note: Where n = ADC resolution in bits

Solving for T_C:

$T_C=-C_{HOLD}(R_{IC}+R_{SS}+R_S)ln(1/8191)$

$T_C=-28pF(1k\mathrm{\Omega }+7k\mathrm{\Omega }+10k\mathrm{\Omega })ln\left(0.0001221\right)$

$T_C=4.54\mu s$

Therefore:

$T_{ACQ}=2\mu s+4.54\mu s+\left[\right(50°C-25°C\left)\right(0.05\mu s/°C\left)\right]$

$T_{ACQ}=7.79\mu s$