28.4 UTMR Operation

The basic UTMR module has a counter/timer, a double-buffered period register, and a hardwired compare function. Together with an External Reset Selector (ERS), Clock Selection MUX, and programmable Start/Stop/Reset logic, the module can be configured for a variety of hardware limit and signal measurement functions. See Figure 28-1 for the UTMR module block diagram.

Available options include:
  1. Synchronous or asynchronous operation.
  2. Software control via the ON bit.
  3. Asynchronous read and Reset of the counter/timer using the CAPT and CLR bits.
  4. Selection of a variety of hardware ERS inputs.
  5. A variety of both software and hardware triggers for start, stop and Reset events.
  6. A Limit mode that stops the counter/timer on a period register match.
  7. A One Shot/Monostable mode option.

Together, the various combination of options implements all the functions for both a signal measurement and hardware limit timer.