11.5.1 Control A

Name:	CTRLA
Offset:	0x00
Reset:	0x00
Property:	Configuration Change Protection


Bit	7	6	5	4	3	2	1	0
		CMD[6:0]
Access		R/W	R/W	R/W	R/W	R/W	R/W	R/W
Reset		0	0	0	0	0	0	0

Bits 6:0 – CMD[6:0] Command

Write this bit field to enable or issue a command. The Chip Erase and EEPROM Erase commands start when writing the command. The others enable an erase or write operation. The operation is started by doing a store instruction to an address location.

A change from one command to another must always go through a No command (NOCMD) or No operation (NOOP) command. If attempting written to a programming command (except NOCMD or NOOP) while the Flash or EEPROM is busy, a Command Collision error is signalized in the ERROR bit field in the NVMCTRL.STATUS register.


Value	Name	Description
`0x00`	NOCMD	No command
`0x01`	NOOP	No operation
`0x02`	FLWR	Flash Write Enable
`0x08`	FLPER	Flash Page Erase Enable
`0x09`	FLMPER2	Flash 2-page Erase Enable
`0x0A`	FLMPER4	Flash 4-page Erase Enable
`0x0B`	FLMPER8	Flash 8-page Erase Enable
`0x0C`	FLMPER16	Flash 16-page Erase Enable
`0x0D`	FLMPER32	Flash 32-page Erase Enable
`0x12`	EEWR	EEPROM Write Enable
`0x13`	EEERWR	EEPROM Erase and Write Enable
`0x18`	EEBER	EEPROM Byte Erase Enable
`0x19`	EEMBER2	EEPROM 2-byte Erase Enable
`0x1A`	EEMBER4	EEPROM 4-byte Erase Enable
`0x1B`	EEMBER8	EEPROM 8-byte Erase Enable
`0x1C`	EEMBER16	EEPROM 16-byte Erase Enable
`0x1D`	EEMBER32	EEPROM 32-byte Erase Enable
`0x20`	CHER	Erase Flash and EEPROM. EEPROM is skipped if EESAVE fuse is set. (UPDI access only.)
`0x30`	EECHER	Erase EEPROM
`Other`	-	Reserved