6.1.9 Chip Erase

Erase the entire Flash using a DSU command.

Note: The debugger checks that the chip erase lock is not set before issuing this command. For more details, see the DSU.STATUSB.CELCK bit description in the PIC32CX-BZ2 and WBZ45 Family Data Sheet (DS70005504).

The chip erase operation depends on clocks and power management features that can be altered by the CPU. For that reason, it is recommended that a chip erase be issued after a cold-plugging procedure to ensure that the device is in a known and safe state.

The recommended sequence is as follows:

  1. Perform the cold plugging procedure (refer to the Cold Plugging). The device then:
    1. Detects the debugger probe.
    2. Holds the CPU in reset.
  2. Perform the chip erase command by writing a ‘1’ to CTRL.CE. The device then:
    1. Clears the system volatile memories.
    2. Erases the whole Flash array (including the EEPROM emulation area, not including auxiliary rows).
    3. Erases the lock row, removing the NVMCTRL security bit protection.
  3. Check for completion by polling STATUS.DONE (read as one when completed).
  4. Reset the device to allow the NVMCTRL update fuses.
Table 6-7. Reference
StepCommands
Clear flags in STATUSAWriteD8(@DSUEXT.STATUSA DSU_STATUSA_MASK)
Issue Chip EraseWriteD8(@DSUEXT.CTRL, DSU_CTRL_CE)
Wait until Erase is doneReadD8(@DSUEXT.STATUSA,StatusValue)

While ( (StatusValue & DSU_STATUSA_DONE) == 0)

{

ReadD8(@DSUEXT.STATUSA,StatusValue)

}

Device Specific Definitions:

  • DSU_CTRL_CE = 0x10
  • DSU_STATUSA_MASK = 0x1F
  • DSU_STATUSA_DONE = 0x1
  • DSUEXT.CTRL = 0x41000100
  • DSUEXT.STATUSA = 0x41000101
Note: The recommended time-out for waiting for erase completion is 20 seconds (the data sheet specifies a maximum of 12s).