2 Overview

The ZCD detects when an alternating voltage crosses through a threshold voltage level near ground potential. The threshold is the zero-cross reference voltage, Z_CPINV. The connection from the ZCD input pin (ZCIN) to the alternating voltage must be made through a series current-limiting resistor (R_SERIES). The ZCD applies either a current source or current sink to the ZCD input pin to maintain a constant voltage on the pin, thereby preventing the pin voltage from forward biasing the electrostatic discharge (ESD) protection diodes in the device.

When the applied voltage is greater than the reference voltage, the ZCD sinks current. When the applied voltage is less than the reference voltage, the ZCD sources current, thus allowing connection to high voltages without a resistance divider, and only through a series resistance.

The ZCD can be used when monitoring an alternating waveform for, but not limited to, the following purposes:

Period measurement
Accurate long-term time measurement
Dimmer phase-delayed drive
Low-EMI cycle switching

Figure 2-1. Zero-Cross Detector Block Diagram

The ZCD requires a current-limiting resistor in series (R_SERIES) with the external voltage source. If the peak amplitude (V_PEAK) of the external voltage source is expected to be stable, the resistor value must be chosen such that a 300 μA resistor current results in a voltage drop equal to the expected peak voltage. The power rating of the resistor must be at least the mean square voltage divided by the resistor value. The STATE bit in the ZCDn.STATUS register indicates whether the input signal is above or below the reference voltage, Z_CPINV. By default, the STATE bit is ‘1’ when the input signal is above the reference voltage and ‘0’ when the input signal is below the reference voltage. The polarity of the STATE bit can be reversed by writing the INVERT bit to ‘1’ in the ZCDn.CTRLA register. The INVERT bit will also affect the ZCD interrupt polarity.

The actual voltage at which the ZCD changes state is the zero-cross reference voltage. Because this reference voltage is slightly offset from the ground, the zero-cross event generated by the ZCD will occur either early or late with respect to the true zero-crossing. This offset time can be compensated by adding a pull-up or pull-down biasing resistor to the ZCD input pin. A pull-up resistor is used when the external voltage source is referenced to ground, and a pull-down resistor is used when the voltage is referenced to V_DD, as shown in Figure 2-1.

The following equations help calculate the external components value:

Equation 2-1. External Resistor Value Calculation

$R_{S E R I E S} = \frac{V_{P E A K}}{3 x 10^{- 4}}$

When the External Voltage source is referenced to ground:

Equation 2-2. ZCD Pull-Up Resistor Value Calculation

$R_{P U L L U P} = \frac{R_{S E R I E S} (V_{P U L L U P} - Z_{C P I N V})}{Z_{C P I N V}}$

When the External Voltage source is referenced to V_DD:

Equation 2-3. ZCD Pull-Down Resistor Value Calculation

$R_{P U L L D O W N} = \frac{R_{S E R I E S} x Z_{C P I N V}}{{V_{D D} - Z}_{C P I N V}}$

In Idle sleep mode, the ZCD will continue to operate as normal.

In Standby sleep mode, the ZCD is disabled by default. If the Run in Standby (RUNSTDBY) bit in the Control A (ZCDn.CTRLA) register is written to ‘1’, the ZCD will continue to operate as normal with interrupt generation, event generation, and ZCD output on pin even if CLK_PER is not running in Standby sleep mode. In Power-Down sleep mode, the ZCD is disabled, including its output to pin.

The ZCD can generate the following events:

Table 2-1. ZCD Event Generator
Generator Name		Description	Event Type	Generator Clock Domain	Length of Event
Peripheral	Event	Description	Event Type	Generator Clock Domain	Length of Event
ZCDn	OUT	ZCD output level	Level	Asynchronous	Determined by the ZCD output level

The ZCD has no event inputs.

TB3233

2 Overview