13.3.3.1 Sleep Modes

Three different sleep modes can be enabled to reduce power consumption.

Idle
The CPU stops executing code, resulting in reduced power consumption.
All peripherals are running, and all interrupt sources can wake the device.
Standby
All high-frequency clocks are stopped unless running in Standby sleep mode is enabled for a peripheral or clock. This is enabled by writing the corresponding RUNSTDBY bit to ‘1’. The power consumption is dependent on the enabled functionality.
A subset of interrupt sources can wake the device(1).
Power-Down
All high-frequency clocks are stopped, resulting in a power consumption lower than the Idle sleep mode.
When operating at temperatures above 70°C, the power consumption can be reduced further by writing the High-Temperature Low Leakage Enable (HTLLEN) bit in the Voltage Regulator Control (SLPCTRL.VREGCTRL) register to ‘1’.
A subset of the peripherals are running, and a subset of interrupt sources can wake the device.(1)
Important: The TWI address match and CCL wake-up sources must be disabled when High-Temperature Low Leakage Enable is activated to avoid unpredictable behavior.
Note:
  1. Refer to the Sleep Mode Activity tables for further information.

Refer to the Wake-up Time section for information on how the wake-up time is affected by the different sleep modes.

Table 13-2. Sleep Mode Activity Overview for Peripherals
Peripheral Active in Sleep Mode
Idle Standby Power-Down
HTLLEN=0 HTLLEN=1
CPU - - - -
RTC X X(1,2) X(2) X(2)
WDT X X X X
BOD X X X X
EVSYS X X X X
CCL X X(1) - -
ACn
ADCn
DACn
OPAMP
ZCDn
TCAn
TCBn
All other peripherals X - - -
Note:
  1. For the peripheral to run in Standby sleep mode, the RUNSTDBY bit of the corresponding peripheral must be set.

  2. In Standby sleep mode, only the RTC functionality requires the RUNSTDBY bit to be set.
    In Power-Down sleep mode, only the PIT functionality is available.

Table 13-3. Sleep Mode Activity Overview for Clock Sources
Clock Source Active in Sleep Mode
Idle Standby Power-Down
HTLLEN=0 HTLLEN=1
Main clock source X X(1) - -
RTC clock source X X(1,2) X(2) X(2)
WDT oscillator X X X X
BOD oscillator(3) X X X X
CCL clock source X X(1) - -
TCD clock source X - - -
Note:
  1. For the clock source to run in Standby sleep mode, the RUNSTDBY bit of the corresponding peripheral must be set.

  2. In Standby sleep mode, only the RTC functionality requires the RUNSTDBY bit to be set.
    In Power-Down sleep mode, only the PIT functionality is available.

  3. The Sampled mode only.
Table 13-4. Sleep Mode Wake-up Sources
Wake-Up Sources Active in Sleep Mode
Idle Standby Power-Down
HTLLEN=0 HTLLEN=1
PORT Pin interrupt X X(1) X(1) X(1)
BOD VLM interrupt X X X X
MVIO interrupts X X X X
RTC interrupts X X(2,3) X(3) X(3)
TWI Address Match interrupt X X X -
CCL interrupts X X X(4) -
USART Start-Of-Frame interrupt - X - -
TCAn interrupts X X(2) - -
TCBn interrupts
ADCn interrupts
ACn interrupts
ZCD interrupts
All other interrupts X - - -
Note:
  1. The I/O pin must be configured according to Asynchronous Sensing Pin Properties in the PORT section.
  2. For the peripheral to run in Standby sleep mode, the RUNSTDBY bit of the corresponding peripheral must be set.

  3. In Standby sleep mode, only the RTC functionality requires the RUNSTDBY bit to be set.
    In Power-Down sleep mode, only the PIT functionality is available.

  4. CCL will only wake up the device if the path through LUTn is asynchronous (FILTSEL=0x0 and EDGEDET=0x0 in the CCL.LUTnCTRLA register).