10 Revision History
Revision C (October 2025)
: No changes have been made to the functional
                operation or electrical characteristics of the device.
            - Features:- Added AEC-Q100 bullet to Features list.
- Corrected SWI-PWM speed to 100 kbps.
 
- Random Number Generator (RNG): Updated SP 800-90C to the released version of the spec.
- General I/O Information: Corrected SWI-PWM speed to 100 kbps.
- 8-Lead SOIC: Updated SOIC package drawings to latest version.
Revision B (June 2025)
: No changes have been made to the actual
                silicon. Changes are only to the data sheet.
            - Features:- Added NIST certified to TRNG bullet.
- Added VDFN package option.
 
- Diversified Keys: Added this section.
- Random Number Generator (RNG): Added specification information. Added ESV information.
- DC Parameters: All I/O Interfaces: - Added input thresholds when in Sleep mode (VILS, VIHS).
- Updated Theta JA values. Added VDFN value.
 
- GenKeyCommand: Removed optional MAC generation option.
- NonceCommand: Removed session key information.
- Hardware Tools: Added additional tool descriptions.
- Package Drawings: Added VDFN package information.
- Product Identification System: Product Identification now separate section and not part of Back Matter. Updated ordering codes. Added VDFN package information.
- Microchip Information: Back Matter simplified per Microchip’s new standard.
Revision A (March 2023)
- Initial data sheet release.
