Introduction
The Microchip MCP2222 USB Protocol Converter device you received functionally conforms to the current device data sheet (DS40002695A), except for the anomalies described in this document.
The errata described in this document apply to revisions with the revision IDs listed in the table below.
The errata described in this document will be addressed in a future revision.
Note: This document summarizes all known errata issues
across all silicon revisions, both previous and current.
| Part Number | Revision ID |
|---|---|
| A0 | |
| MCP2222 | 0x10 |
| Feature | Item No. | Issue Summary | Affected Firmware Revisions |
|---|---|---|---|
| A0 | |||
| CDC line-coding control | Issuing a Set-Line-Coding Command During an Active Data Transfer Can Cause Data Corruption and/or Data Loss | Issuing a set-line-coding command may cause
data corruption during active transfer | X |
| USB suspension | USB Host Suspension May Abort Active I2C/SPI Transfers | USB host suspension may abort active I2C/SPI transfers | X |
| USB Host Suspension May Cause Last UART Byte to Not Be Transmitted | USB host suspension may cause the last UART byte not to be transmitted | X | |
| UART data width | 5-Bit Data Width May Cause UART Failure at 921600 bps or Higher Without Flow Control | A 5-bit data width may cause UART failure at 921600 bps or higher without flow control | X |
| UART notification | UART Overrun Error May Occur and Go Unreported Without Flow Control | A UART overrun error may occur and go unreported without flow control | X |
| Concurrent SPI and I2C transfers | Concurrent SPI and I2C transfer |
Concurrent SPI and I2C operation under worst-case stress may cause intermittent transfer failures at an approximate rate of 1 in 10⁵ transfers | X |
| SPI exchange operation | An SPI Exchange Operation Exceeding 60 Bytes May Intermittently Fail | SPI exchange operations larger than 60 bytes may intermittently fail | X |
|
Note: Only the issues indicated in the last column apply
to the current silicon revision.
| |||