3.1 Pinout and Multiplexing


Package/Pin Number									A	B				C	D	E	F	G	H	I	P
VQFN/ TQFP			VQFN	SSOP/ SPDIP	VQFN	SSOP	Pin name	Special	EXTINT	ADC0		PTC	ACn	SERCOMn		TCn	TCC0		CCLn, ACn OUT	GCLKn	PTC
64-pin	48-pin	32-pin	28-pin	28-pin	20-pin	20-pin	Pin name	Special	EXTINT	Pos	Neg	EXTCINT	ACn	def. and alt.	alt.	TCn	def. and alt.	SWCLK	CCLn, ACn OUT	GCLKn	X/Y
62	44	30	26	22	17	4	PA00	XTAL32K1⁽⁵⁾	EXTINT[0]					0,PAD[0]⁽²⁾	1,PAD[0]⁽¹⁾	0,WO0⁽¹⁾	WO0		0,IN0	1,IO
63	45	31	27	23	18	5	PA01	XTAL32K2⁽⁵⁾	NMI					0,PAD[1]⁽²⁾	1,PAD[1]⁽¹⁾	0,WO1⁽¹⁾	WO1		0,IN1	2,IO
64	46	32	28	24	19	6	PA02		EXTINT[2]	AINP2	AINN2			0,PAD[2]	1,PAD[2]⁽¹⁾	1,WO0⁽¹⁾	WO2		0,IN2	3,IO	X2/Y2
1	47	1	1	25	20	7	PA03		EXTINT[3]	AINP3	AINN3			0,PAD[3]	1,PAD[3]⁽¹⁾	1,WO1⁽¹⁾	WO3		0,OUT	0,IO	X3/Y3
2	48	2	2	26	1	8	PA04		EXTINT[4]	AINP4	AINN4			0,PAD[0]^(1,2)						1,IO⁽¹⁾	X4/Y4
3	1	3	3	27	2	9	PA05		EXTINT[5]	AINP5	AINN5			0,PAD[1]^(1,2)					AC1⁽⁴⁾	2,IO⁽¹⁾	X5/Y5
4	2	4	4	28	3	10	PA06		EXTINT[6]	AINP6	AINN6			0,PAD[2]⁽¹⁾					0,OUT⁽¹⁾	3, IO⁽¹⁾	X6/Y6
5	3	5	5	1	4	11	PA07		NMI	AINP7	AINN7			0,PAD[3]⁽¹⁾					AC0⁽⁴⁾	0,IO⁽¹⁾	X7/Y7
6							VDD
7							GND
8	4						PB00		EXTINT[0]						1,PAD[0]⁽¹⁾		WO0⁽¹⁾
9	5						PB01		EXTINT[1]						1,PAD[1]⁽¹⁾		WO1⁽¹⁾
10	6						PB02		EXTINT[2]						1,PAD[2]⁽¹⁾		WO2⁽¹⁾
11	7						PB03		EXTINT[3]						1,PAD[3]⁽¹⁾		WO3⁽¹⁾
12	8						PB04		EXTINT[4]
13	9						PB05		EXTINT[5]
14							PB06		EXTINT[6]
15							PB07		EXTINT[7]
16	10	6	6	2			PA08	VDDIO2⁽³⁾	EXTINT[8]					1,PAD[2]	0,PAD[2]⁽¹⁾	1,WO0	WO0⁽¹⁾		1,IN0	1.IO⁽¹⁾
17	11	7	7	3	5	12	PA09	VDDIO2⁽³⁾	EXTINT[9]					1,PAD[3]	0,PAD[3]⁽¹⁾	1,WO1	WO1⁽¹⁾		1,IN1	2,IO⁽¹⁾
18	12	8	8	4	6	13	PA10	VDDIO2⁽³⁾	EXTINT[10]					1,PAD[0]	0,PAD[0]^(1,2)	0,WO0	WO2⁽¹⁾		1,IN2	3,IO⁽¹⁾
19	13	9	9	5	7	14	PA11	VDDIO2⁽³⁾	EXTINT[11]					1,PAD[1]	0,PAD[1]^(1,2)	0,WO1	WO3⁽¹⁾		1,OUT	1,IO⁽¹⁾
20	14	10	10	6	8	15	VDDIO2
21	15						GND
22	16						PA12	VDDIO2⁽³⁾	EXTINT[12]					1,PAD[2]⁽¹⁾
23	17						PA13	VDDIO2⁽³⁾	EXTINT[13]					1,PAD[3]⁽¹⁾					AC1^(1,4)
24	18						PA14	VDDIO2⁽³⁾	EXTINT[14]					1,PAD[0]⁽¹⁾					1,OUT⁽¹⁾
25	19						PA15	VDDIO2⁽³⁾	EXTINT[15]					1,PAD[1]⁽¹⁾					AC0^(1,4)
26	20						PA16		EXTINT[0]	AINP16	AINN16		0,N1 1,N1				WO0⁽¹⁾		2,IN0		X16/Y16
27	21	11	11	7			PA17		EXTINT[1]	AINP17	AINN17						WO1⁽¹⁾		2,IN1		X17/Y17
28	22	12	12	8			PA18		EXTINT[2]	AINP18	AINN18		0,P0 1,P0				WO2⁽¹⁾		2,IN2		X18/Y18
29	23	13	13	9			PA19		EXTINT[3]	AINP19	AINN19		0,N0 1,P1				WO3⁽¹⁾		2,OUT		X19/Y19
30	24	14	14	10	9	16	PA20	SWDIO	EXTINT[4]	AINP20	AINN20		0,P5 1,P2	1,PAD[0]⁽¹⁾		2,WO0				2,IO⁽¹⁾	X20/Y20
31	25	15	15	11	10	17	PA21		EXTINT[5]	AINP21	AINN21	EXTCINT0	0,P6 1,N0/P5	1,PAD[1]⁽¹⁾		2,WO1				3,IO⁽¹⁾	X21/Y21
32	26	16	16	12	11	18	PA22		EXTINT[6]	AINP22	AINN22	EXTCINT1	0,P3 1,P3	1,PAD[2]⁽¹⁾					2,OUT⁽¹⁾	1, IO⁽¹⁾	X22/Y22
33	27	17	17	13	12	19	PA23	VREFA	EXTINT[7]	AINP23	AINN23		0,N2 1,N2	1,PAD[3]⁽¹⁾						0,IO⁽¹⁾	X23/Y23
34	28	18	18	14	13	20	AVDD
35	29	19	19	15	14	1	AGND
36	30						PB08		EXTINT[8]	AINP40	AINN40		0,P1				WO0⁽¹⁾				X40/Y40
37	31						PB09		EXTINT[9]	AINP41	AINN41						WO1⁽¹⁾				X41/Y41
38	32						PB10		EXTINT[10]	AINP42	AINN42		0,P2				WO2⁽¹⁾				X42/Y42
39	33						PB11		EXTINT[11]	AINP43	AINN43						WO3⁽¹⁾				X43/Y43
40							PB12		EXTINT[12]	AINP44	AINN44										X44/Y44
41							PB13		EXTINT[13]	AINP45	AINN45										X45/Y45
42							PB14		EXTINT[14]	AINP46	AINN46										X46/Y46
43							PB15		EXTINT[15]	AINP47	AINN47										X47/Y47
44	34	20	20	16			PA24	XTAL32K1⁽⁶⁾	EXTINT[8]	AINP24	AINN24			1,PAD[2]⁽¹⁾			WO0⁽¹⁾		3,IN0	1,IO⁽¹⁾	X24/Y24
45	35	21	21	17			PA25	XTAL32K2⁽⁶⁾	EXTINT[9]	AINP25	AINN25			1,PAD[3]⁽¹⁾			WO1⁽¹⁾		3,IN1	2,IO⁽¹⁾	X25/Y25
46	36	22					PA26		EXTINT[10]	AINP26	AINN26			1,PAD[0]⁽¹⁾			WO2⁽¹⁾		3,IN2	3,IO⁽¹⁾	X26/Y26
47	37	23					PA27		EXTINT[11]	AINP27	AINN27			1,PAD[1]⁽¹⁾			WO3⁽¹⁾		3,OUT		X27/Y27
48	38	24					PA28		EXTINT[12]	AINP28	AINN28										X28/Y28
49	39	25					PA29		EXTINT[13]	AINP29	AINN29									1,IO⁽¹⁾	X29/Y29
50	40	26	22	18	15	2	PA30	RESET	NMI
51	41	27	23	19	16	3	PA31	SWCLK	EXTINT[15]	AINP31	AINN31			1,PAD[0]⁽¹⁾	0,PAD[2]⁽¹⁾			SWCLK		0,IO⁽¹⁾	X31/Y31
52							PB16		EXTINT[0]								WO0⁽¹⁾
53							PB17		EXTINT[1]								WO1⁽¹⁾
54							PB18		EXTINT[2]								WO2⁽¹⁾
55							PB19		EXTINT[3]								WO3⁽¹⁾
56	42	28	24	20			VDD
57	43	29	25	21			GND
58							PB20		EXTINT[4]							2,WO0⁽¹⁾
59							PB21		EXTINT[5]							2,WO1⁽¹⁾
60							PB22		EXTINT[6]
61							PB23		EXTINT[7]

Alternative pin position. To select alternative pin positions, refer to the Port Multiplexer chapter.
This pin supports I²C with SERCOM0.
This pin is on the VDDIO2 power domain. For usage and properties, refer to the MVIO description in the SUPC - Supply Controller and in the Electrical Characteristics sections.
The output of the Analog Comparator to the pin can be used as input to the CCL. Refer also to the CCL - Configurable Custom Logic section.
Applicable only for 20-pin devices.
Not applicable for 20-pin devices.