2 Implementation
Three different 1-Wire implementations are discussed here; software only (polled), polled UART, and interrupt-driven UART. A short description of each is given below. Detailed information about the usage of the drivers is not included in this document. See the documentation included with the source code for this application note for details on how to use the different drivers.
It is possible to implement the 1-Wire protocol in software only, without using any special hardware. This solution has the advantage that the only hardware it occupies is one general purpose I/O pin (GPIO). Since all GPIO pins on the AVR are bi-directional and have selectable internal pull-up resistors, the AVR can control a 1-Wire bus with no external support-circuitry. In case the internal pull-up resistor is not suitable for the current configuration of slave devices, only one external resistor is needed. On the downside, this implementation relies on busy waiting during “Reset/Presence” and bit signaling. To ensure correct timing on the 1-Wire bus, interrupts must be disabled during the transmission of bits. The allowed delay between transmission of two bits (recovery time) has no upper limit, however, so it is safe to handle interrupts after every bit transmission. This makes the worst-case interrupt latency due to 1-Wire bus activity equal to the execution time of the “Reset/Presence” signal, less than 1 ms.
The polled UART driver uses the UART module found on many AVRs to generate the necessary waveforms at the bit-level. The rest of the driver is equal to the software only driver. The main advantage with this driver compared to the software-only driver is code size and the fact that interrupts do not need to be turned off during bit signaling since the UART module handles the timing details independently. On the downside, it requires two GPIO pins and some external support circuitry.
The interrupt-driven UART driver uses the UART to generate the waveforms in the same way as the polled UART driver. Also, takes advantage of the interrupt capabilities found in the UART module to automate sending or receiving up to 255 bits of data.