18.5.1 Control A

Name: CTRLA
Offset: 0x00
Reset: 0x00
Property: Configuration Change Protection

Bit 76543210 
    SAMPFREQACTIVE[1:0]SLEEP[1:0] 
Access RRRR/WR/W 
Reset 00000 

Bit 4 – SAMPFREQ Sample Frequency

This bit controls the BOD sample frequency.

The Reset value is loaded from the SAMPFREQ bit in FUSE.BODCFG.

This bit is not under Configuration Change Protection (CCP).

ValueDescription
0x0 Sample frequency is 128 Hz
0x1 Sample frequency is 32 Hz

Bits 3:2 – ACTIVE[1:0] Active

These bits select the BOD operation mode when the device is in Active mode or Idle sleep mode.

The Reset value is loaded from the ACTIVE bits in FUSE.BODCFG.

These bits are not under Configuration Change Protection (CCP).

ValueNameDescription
0x0 DIS Disabled
0x1 ENABLED Enabled in Continuous mode
0x2 SAMPLE Enabled in Sampled mode
0x3 ENWAKE Enabled in Continuous mode. Execution is halted at wake-up until BOD is running.

Bits 1:0 – SLEEP[1:0] Sleep

These bits select the BOD operation mode when the device is in Standby or Power-Down sleep mode. The Reset value is loaded from the SLEEP bits in FUSE.BODCFG.
ValueNameDescription
0x0 DIS Disabled
0x1 ENABLED Enabled in Continuous mode
0x2 SAMPLED Enabled in Sampled mode
0x3 - Reserved