33.5.1 Hardware Interface

The following table details the connections to be applied between the EBI pins and the external devices for each Memory Controller.

Table 33-3. EBI Pins and External Static Device Connections

Signals:
EBI_

Pins of the Interfaced Device
8-bit
Static Device2 x 8-bit
Static Devices16-bit
Static Device
ControllerSMC
D0–D7D0–D7D0–D7D0–D7
D8–D15–D8–D15D8–D15
A0/NBS0A0–NLB
A1A1A0A0
A2–A23A[2:23]A[1:22]A[1:22]
NCS0CSCSCS
NCS1CSCSCS
NCS2CSCSCS
NCS3/NANDCSCSCSCS
NRDOEOEOE
NWR0/NWEWEWE (see Note)WE
NWR1/NBS1–WE (see Note)NUB
Note: NWR1 enables upper byte writes. NWR0 enables lower byte writes.
Table 33-4. EBI Pins and External Device Connections

Signals:
EBI_

Power supplyPins of the Interfaced Device
NAND Flash
ControllerNFC
D0–D15VDDIOD0–D15
A0/NBS0VDDIO–
A1VDDIO–
A2–A10VDDIO–
A11VDDIO–
A12VDDIO–
A13–A14VDDIO–
A15VDDIO–
A16VDDIO–
A17VDDIO–
A18VDDIO–
A19VDDIO–
A20VDDIO–
A21/NANDALEVDDIOALE
A22/NANDCLEVDDIOCLE
A23VDDIO–
NCS0VDDIO–
NCS1VDDIO–
NCS2VDDIO–
NCS3/NANDCSVDDIOCE
NANDOEVDDIOOE
NANDWEVDDIOWE
NRDVDDIO–
NWR0/NWEVDDIO–
NWR1/NBS1VDDIO–
PxxVDDIOCE
PxxVDDIORDY