45.7.3 20-Pin IDC JTAG Connector

For debuggers and/or programmers that support the 20-pin IDC JTAG Connector, for example, the SAM-ICE, the signals must be connected as shown in the figure below with details described in the table.

Figure 45-13. 20-pin IDC JTAG Connector
Table 45-11. 20-pin IDC JTAG Connector
Header Signal NameDescription
SWDCLKSerial wire clock pin
SWDIOSerial wire bidirectional data pin
RESETTarget device reset pin, active low
VCCTarget voltage sense, should be connected to the device VDD
GNDGround
GND*These pins are reserved for firmware extension purposes. They can be left open or connected to GND in normal debug environment. They are not essential for SWD in general.