4.1 Revision History


Doc Rev.	Date	Comments
B	11/2023	Document: Editorial updates Silicon Errata Issue added: Device: Write Operation Lost if Consecutive Writes to Specific Address Space NVMCTRL: Wrong Reset Value of NVMCTRL.CTRLA Register TCD: Halting TCD and Waiting for SW Restart Does Not Work if Compare Value A is ‘`0`’ or Dual Slope Mode is Used Silicon Errata Issues updated: Device: Writing the OSCLOCK Fuse in FUSE.OSCCFG to ‘1’ Prevents Automatic Loading of Calibration Values RTC: Any Write to the RTC.CTRLA Register Resets the RTC and PIT Prescaler TWI: TIMEOUT Bit Field in the TWIn.MCTRLA Register is Corrupted Silicon Errata Issue removed: USART: Start-of-Frame Detection Can Unintentionally Be Triggered in Active Mode Added new data sheet clarifications: SLPCTRL: Sleep Mode Activity Overview ADC: VREFA Electrical Characteristics: I/O Pin Characteristics Memory Programming Specifications
A	12/2020	Initial document release The content of the document has been restructured from: ATtiny214/414/814 Silicon Errata and Data Sheet Clarification ATtiny416/816 Silicon Errata and Data Sheet Clarification ATtiny417/817 Silicon Errata and Data Sheet Clarification to: ATtiny417/814/816/817 Silicon Errata and Data Sheet Clarification (this document) Refer to Appendix - Obsolete Revision History for further details. The following item is referring to changes between the latest revisions of the obsolete documents and this document: Silicon revision A removed from Silicon issues summary, as this was never released to production