27.5.8 Debug Operation

When the CPU is halted in debug mode, the PM continues normal operation. If the STANDBY sleep mode is requested by the system while in debug mode, the power domains are not turned off. As a consequence, power measurements while in debug mode are not relevant.

When there is no debug session, in the Hibernate or Backup sleep mode the core power domains are OFF. If the Hibernate or Backup sleep mode is requested by the system while in debug mode, the core domains are kept on, and the debug modules are kept running to allow the debugger to access internal registers. When exiting the Hibernate or Backup sleep mode upon a reset condition, the core domains are reset except the debug logic, allowing users to continue in the current debug session.