45.7.14 Filter Buffer Value
Note: This register is write-synchronized: SYNCBUSY.FILTER must be checked to ensure the
FILTERBUF register synchronization is complete.
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | FILTERBUF |
Offset: | 0x19 |
Reset: | 0x00 |
Property: | Write-Synchronized |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
FILTERBUF[7:0] | |||||||||
Access | RW | RW | RW | RW | RW | RW | RW | RW | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bits 7:0 – FILTERBUF[7:0] Filter Buffer Value
These bits hold the value of the filter buffer register. The value is copied in the corresponding FILTER register on UPDATE condition.
These bits have no effect when COUNTER operation mode is selected.