13.8.1 Cache Type
Symbol | Description | Symbol | Description | Symbol | Description |
---|---|---|---|---|---|
R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
K | Write to clear | S | Software settable bit | — | — |
Name: | TYPE |
Offset: | 0x00 |
Reset: | 0x000012D2 |
Property: | Read Only |
Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
Access | |||||||||
Reset |
Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
Access | |||||||||
Reset |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
CLSIZE[2:0] | CSIZE[2:0] | ||||||||
Access | R | R | R | R | R | R | |||
Reset | 0 | 1 | 0 | 0 | 1 | 0 |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
LCKDOWN | WAYNUM[1:0] | RRP | GCLK | ||||||
Access | R | R | R | R | R | ||||
Reset | 1 | 1 | 0 | 1 | 1 |
Bits 13:11 – CLSIZE[2:0] Cache Line Size
Value | Name | Description |
---|---|---|
0x0-0x1 | - | Reserved |
0x2 | CLSIZE_16B | Cache Line Size is 16 bytes |
0x3-0x7 | - | Reserved |
Bits 10:8 – CSIZE[2:0] Cache Size
Value | Name | Description |
---|---|---|
0x0 | CSIZE_1KB | Cache Size is 1 KB |
0x1 | CSIZE_2KB | Cache Size is 2 KB |
0x2 | CSIZE_4KB | Cache Size is 4 KB |
0x3-0x7 | - | Reserved |
Bit 7 – LCKDOWN Lock Down Supported
Writing a '0' to this bit disables the Lock Down feature.
Writing a '1' to this bit enables the Lock Down feature.
Value | Description |
---|---|
0 | Lock Down feature is not supported. |
1 | Lock Down feature is supported. |
Bits 6:5 – WAYNUM[1:0] Number of Way
Value | Name | Description |
---|---|---|
0x0 | DMAPPED | Direct Mapped Cache |
0x1 | ARCH2WAY | 2-WAY set associative |
0x2 | ARCH4WAY | 4-WAY set associative |
0x3 | Reserved | Reserved |
Bit 4 – RRP Round Robin Policy Supported
Writing a '0' to this bit disables Round Robin Policy.
Writing a '1' to this bit enables Round Robin Policy.
Value | Description |
---|---|
0 | Round Robin Policy is disabled. |
1 | Round Robin Policy is enabled. |
Bit 1 – GCLK Dynamic Clock Gating
Writing a '0' to this bit disables the Dynamic Clock Gating feature.
Writing a '1' to this bit enables the Dynamic Clock Gating feature.
Value | Description |
---|---|
0 | Dynamic Clock Gating is disabled. |
1 | Dynamic Clock Gating is enabled. |