| F | 09/2024 |
- Added new device
revision (AB)
- Added errata:
- Device: Write Operation Lost if Consecutive Writes to
Specific Address Spaces
|
| E | 12/2023 |
- Removed data sheet clarifications:
- 3.1. Features
- 3.2. FUSE - Configuration and User Fuses
- 3.3.
RSTCTRL - Reset Controller
- 3.4. TWI
- Two-Wire Interface
- 3.5. Electrical Characteristics - Peripheral Power
Consumption
- 3.6. Electrical Characteristics - Memory Programming
Specifications
- 3.7. Electrical Characteristics - VREF
- 3.8. Electrical Characteristics - DAC
- 3.9. Electrical Characteristics - ADC
|
| D | 02/2022 |
- Added data sheet
clarifications:
- 3.1.
Features
- 3.2. FUSE
- Configuration and User Fuses
- 3.5.
Electrical Characteristics - Peripheral Power
Consumption
- 3.6.
Electrical Characteristics - Memory Programming
- 3.7.
Electrical Characteristics - VREF
- 3.8.
Electrical Characteristics - DAC
- 3.9.
Electrical Characteristics - ADC
- Updated data
sheet clarifications:
- 3.3.
RSTCTRL - Reset Controller
- 3.4. TWI
- Two-Wire Interface
|
| C | 10/2021 |
- Updated errata:
- Device:
Some Reserved Fuse Bits Are ‘
1’
- Device:
CRC Check During Reset Initialization Is Not
Functional
- USART:
Start-of-Frame Detection Can Unintentionally Be
Enabled in Active Mode When RXCIF Is
‘
0’
- Added errata:
- CLKCTRL:
PLL Status Not Working as Expected
- DAC: DAC Output Buffer Lifetime Drift
- TCD:
Halting TCD and Wait for SW Restart Does Not Work
if Compare Value A Is
0 or Dual
Slope Mode Is Used - TWI:
Flush Nonfunctional
- Electrical Characteristics: Endurance of PFM Cell
lower is than specified
|
| B | 11/2020 |
- Added new device
revision (A8)
- Added errata:
- Device:
Some Reserved Fuse Bits Are ‘
1’
- Device:
CRC Check During Reset Initialization Is Not
Functional
- CCL:
The LINK Input Source Selection for LUT3 Is Not
Functional on 28- and 32-Pin Device
- RSTCTRL:
BOD Registers Not Reset When UPDI Is
Enabled
- TCA:
Restart Will Reset Counter Direction in NORMAL
and FRQ Mode
- TCB:
CCMP and CNT Registers Operate as 16-Bit
Registers in 8-Bit PWM Mode
- TCD:
Asynchronous Input Events Not Working When TCD
Counter Prescaler Is Used
- TCD:
CMPAEN Controls All WOx for Alternative Pin
Functions
- USART:
Start-of-Frame Detection Can Unintentionally Be
Enabled in Active Mode When RXCIF Is
‘
0’ - ZCD:
All ZCD Output Selection Bits Are Tied to the
ZCD0 Bit
|
| A | 04/2020 | Initial document release |
