The PIC18F04/05/14/56Q20 devices you have received conform functionally to the current device data sheet (DS40002570A), except for the anomalies described in this document.
The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs listed in the table below.
The errata described in this document will be addressed in future revisions of the PIC18F04/05/14/15Q20 silicon.
Note: This document summarizes all silicon errata issues from
all revisions of silicon, previous as well as current.
| Part Number | Device ID | Revision ID |
|---|---|---|
| A0 | ||
| PIC18F04Q20 | 0x7AE0 | 0xA000 |
| PIC18F05Q20 | 0x7AA0 | 0xA000 |
| PIC18F14Q20 | 0x7AC0 | 0xA000 |
| PIC18F15Q20 | 0x7A80 | 0xA000 |
Important: Refer to the Device/Revision ID section in
the current “PIC18FXXQ20 Family Programming Specification” (DS40002327) for more detailed
information on Device Identification and Revision IDs for your specific device.
| Module | Feature | Item No. | Issue Summary | Affected Revisions |
|---|---|---|---|---|
| A0 | ||||
| I3C | Error Detection and Recovery | 1.1.1 | TE4 error not detected when module operates in I3C mode | X |
| Error Detection and Recovery | 1.1.2 | TE0/TE1 Error Detection cannot be turned off in I2C mode | X | |
| Error Detection and Recovery | 1.1.3 | TE0 Error Detection does not take R/W bit into consideration | X | |
| In-Band Interrupt/Hot-Join | 1.1.4 | Passive Hot-Join/In-Band Interrupt may cause race condition to happen | X | |
| UTMR | Level-Triggered ERS Start/Reset Condition | 1.2.1 | Dead Zone Exists in Level-Triggered Start/Reset Condition When an ERS Signal Is Generated Due to an SFR Access | X |
| Interrupts | 1.2.2 | Interrupts Do Not Work When Leaving Debug Mode | X | |
|
Note: Only those issues indicated in the last
column apply to the current silicon revision.
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