6.1 Multiplexed Signals

Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be assigned to one of the peripheral functions A, B, C, D, E, F, G, or H. To enable a peripheral function on a pin, the Peripheral Multiplexer Enable bit in the Pin Configuration register corresponding to that pin (PINCFGn.PMUXEN, n = 0-31) in the PORT must be written to one. The selection of peripheral function A to H is done by writing to the Peripheral Multiplexing Odd and Even bits in the Peripheral Multiplexing register (PMUXn.PMUXE/O) in the PORT.

This table describes the peripheral signals multiplexed to the PORT I/O pins.

Table 6-1. PORT Function Multiplexing
Pin/Ball			I/O Pin	Supply	Type	A	B⁽²⁾					C⁽¹⁾	D⁽¹⁾	E	F	G	H
SAM D20E (VQFN32,TQFP32/WLCSP27)	SAM D20G (VQFN48,TQFP48/WLCSP45)	SAM D20J (VQFN64,TQFP64/UFBGA64)	I/O Pin	Supply	Type	EIC	REF	ADC	AC	PTC	DAC	SERCOM⁽³⁾	SERCOM-ALT	TC⁽⁴⁾		COM	AC/GCLK
1/A1	1/C12	1/B1	PA00	VDDANA		EXTINT[0]							SERCOM1/ PAD[0]		TC2/WO[0]
2/B2	2/B13	2/C1	PA01	VDDANA		EXTINT[1]							SERCOM1/ PAD[1]		TC2/WO[1]
3/A3	3/C10	3/C3	PA02	VDDANA		EXTINT[2]		AIN[0]		Y[0]	VOUT
4/B4	4/C8	4/D3	PA03	VDDANA		EXTINT[3]	ADC/VREFA DAC/VREFA	AIN[1]		Y[1]
	/D11	5/D2	PB04	VDDANA		EXTINT[4]		AIN[12]		Y[10]
		6/D4	PB05	VDDANA		EXTINT[5]		AIN[13]		Y[11]
		9/E4	PB06	VDDANA		EXTINT[6]		AIN[14]		Y[12]
		10/E3	PB07	VDDANA		EXTINT[7]		AIN[15]		Y[13]
	7/D9	11/E2	PB08	VDDANA		EXTINT[8]		AIN[2]		Y[14]			SERCOM4/ PAD[0]		TC4/WO[0]
	8/E10	12/F4	PB09	VDDANA		EXTINT[9]		AIN[3]		Y[15]			SERCOM4/ PAD[1]		TC4/WO[1]
5/A5	9/F13	13/F1	PA04	VDDANA		EXTINT[4]	ADC/VREFB	AIN[4]	AIN[0]	Y[2]			SERCOM0/ PAD[0]		TC0/WO[0]
6/A7	10/F11	14/F2	PA05	VDDANA		EXTINT[5]		AIN[5]	AIN[1]	Y[3]			SERCOM0/ PAD[1]		TC0/WO[1]
7/A9	11/E8	15/G2	PA06	VDDANA		EXTINT[6]		AIN[6]	AIN[2]	Y[4]			SERCOM0/ PAD[2]		TC1/WO[0]
8/B6	12/G12	16/G1	PA07	VDDANA		EXTINT[7]		AIN[7]	AIN[3]	Y[5]			SERCOM0/ PAD[3]		TC1/WO[1]
11/C7	13/F9	17/H1	PA08	VDDIO	I²C	NMI		AIN[16]		X[0]		SERCOM0/ PAD[0]	SERCOM2/ PAD[0]	TC0/WO[0]
12/C9	14/E6	18/H2	PA09	VDDIO	I²C	EXTINT[9]		AIN[17]		X[1]		SERCOM0/ PAD[1]	SERCOM2/ PAD[1]	TC0/WO[1]
13/D8	15/G10	19/F3	PA10	VDDIO		EXTINT[10]		AIN[18]		X[2]		SERCOM0/ PAD[2]	SERCOM2/ PAD[2]	TC1/WO[0]			GCLK_IO[4]
14/D6	16/F7	20/G3	PA11	VDDIO		EXTINT[11]		AIN[19]		X[3]		SERCOM0/ PAD[3]	SERCOM2/ PAD[3]	TC1/WO[1]			GCLK_IO[5]
	19	23/G4	PB10	VDDIO		EXTINT[10]							SERCOM4/ PAD[2]		TC5/WO[0]		GCLK_IO[4]
	20	24/E5	PB11	VDDIO		EXTINT[11]							SERCOM4/ PAD[3]		TC5/WO[1]		GCLK_IO[5]
		25/F5	PB12	VDDIO	I²C	EXTINT[12]				X[12]		SERCOM4/ PAD[0]		TC4/WO[0]			GCLK_IO[6]
		26/G5	PB13	VDDIO	I²C	EXTINT[13]				X[13]		SERCOM4/ PAD[1]		TC4/WO[1]			GCLK_IO[7]
		27/H5	PB14	VDDIO		EXTINT[14]				X[14]		SERCOM4/ PAD[2]		TC5/WO[0]			GCLK_IO[0]
		28/E6	PB15	VDDIO		EXTINT[15]				X[15]		SERCOM4/ PAD[3]		TC5/WO[1]			GCLK_IO[1]
	21/D7	29/F6	PA12	VDDIO	I²C	EXTINT[12]						SERCOM2/ PAD[0]	SERCOM4/ PAD[0]	TC2/WO[0]			AC/CMP[0]
	22/F5	30/G6	PA13	VDDIO	I²C	EXTINT[13]						SERCOM2/ PAD[1]	SERCOM4/ PAD[1]	TC2/WO[1]			AC/CMP[1]
15/E9	23/G4	31/H6	PA14	VDDIO		EXTINT[14]						SERCOM2/ PAD[2]	SERCOM4/ PAD[2]	TC3/WO[0]			GCLK_IO[0]
16/E7	24/G2	32/H7	PA15	VDDIO		EXTINT[15]						SERCOM2/ PAD[3]	SERCOM4/ PAD[3]	TC3/WO[1]			GCLK_IO[1]
17/F8	25/D5	35/G7	PA16	VDDIO	I²C	EXTINT[0]				X[4]		SERCOM1/ PAD[0]	SERCOM3/ PAD[0]		TC2/WO[0]		GCLK_IO[2]
18/E5	26/F3	36/F8	PA17	VDDIO	I²C	EXTINT[1]				X[5]		SERCOM1/ PAD[1]	SERCOM3/ PAD[1]		TC2/WO[1]		GCLK_IO[3]
19/F6	27/F1	37/F7	PA18	VDDIO		EXTINT[2]				X[6]		SERCOM1/ PAD[2]	SERCOM3/ PAD[2]		TC3/WO[0]		AC/CMP[0]
20/F4	28/E4	38/E7	PA19	VDDIO		EXTINT[3]				X[7]		SERCOM1/ PAD[3]	SERCOM3/ PAD[3]		TC3/WO[1]		AC/CMP[1]
		39/D7	PB16	VDDIO	I²C	EXTINT[0]						SERCOM5/ PAD[0]		TC6/WO[0]			GCLK_IO[2]
		40/D5	PB17	VDDIO	I²C	EXTINT[1]						SERCOM5/ PAD[1]		TC6/WO[1]			GCLK_IO[3]
	29/E2	41/D6	PA20	VDDIO		EXTINT[4]				X[8]		SERCOM5/ PAD[2]	SERCOM3/ PAD[2]	TC7/WO[0]			GCLK_IO[4]
	30/D1	42/C5	PA21	VDDIO		EXTINT[5]				X[9]		SERCOM5/ PAD[3]	SERCOM3/ PAD[3]	TC7/WO[1]			GCLK_IO[5]
21/E3	31/C6	43/C6	PA22	VDDIO	I²C	EXTINT[6]				X[10]		SERCOM3/ PAD[0]	SERCOM5/ PAD[0]		TC4/WO[0]		GCLK_IO[6]
22	32/D3	44/C7	PA23	VDDIO	I²C	EXTINT[7]				X[11]		SERCOM3/ PAD[1]	SERCOM5/ PAD[1]		TC4/WO[1]		GCLK_IO[7]
23	33/C2	45/E8	PA24	VDDIO		EXTINT[12]						SERCOM3/ PAD[2]	SERCOM5/ PAD[2]		TC5/WO[0]
24	34/B1	46/D8	PA25	VDDIO		EXTINT[13]						SERCOM3/ PAD[3]	SERCOM5/ PAD[3]		TC5/WO[1]
	37	49/A8	PB22	VDDIO		EXTINT[6]							SERCOM5/ PAD[2]		TC7/WO[0]		GCLK_IO[0]
	38	50/A7	PB23	VDDIO		EXTINT[7]							SERCOM5/ PAD[3]		TC7/WO[1]		GCLK_IO[1]
25	39/A2	51/B7	PA27	VDDIO		EXTINT[15]											GCLK_IO[0]
27/E1	41/A4	53/A6	PA28	VDDIO		EXTINT[8]											GCLK_IO[0]
31/C3	45/B7	57/B5	PA30	VDDIO		EXTINT[10]							SERCOM1/ PAD[2]		TC1/WO[0]	SWCLK	GCLK_IO[0]
32/D4	46/B9	58/B4	PA31	VDDIO		EXTINT[11]							SERCOM1/ PAD[3]		TC1/WO[1]	SWDIO⁽⁵⁾
		59/C4	PB30	VDDIO	I²C	EXTINT[14]							SERCOM5/ PAD[0]		TC0/WO[0]
		60/B3	PB31	VDDIO	I²C	EXTINT[15]							SERCOM5/ PAD[1]		TC0/WO[1]
		61/B2	PB00	VDDANA		EXTINT[0]		AIN[8]		Y[6]			SERCOM5/ PAD[2]		TC7/WO[0]
		62/A2	PB01	VDDANA		EXTINT[1]		AIN[9]		Y[7]			SERCOM5/ PAD[3]		TC7/WO[1]
	47/A12	63/A1	PB02	VDDANA		EXTINT[2]		AIN[10]		Y[8]			SERCOM5/ PAD[0]		TC6/WO[0]
	48/B11	64/C2	PB03	VDDANA		EXTINT[3]		AIN[11]		Y[9]			SERCOM5/ PAD[1]		TC6/WO[1]

Note:

SERCOM4/SERCOM5 are not available on VQFN32/TQFP32 and WLCSP27 packages.
All analog pin functions are on peripheral function B. Peripheral function B must be selected to disable the digital control of the pin.
Only some pins can be used in SERCOM I²C mode. Refer to the Type column for using a SERCOM pin in I²C mode. Refer to “Electrical Characteristics” for details on the I²C pin characteristics.
TC6 and TC7 are not supported on the SAM D20E and SAM D20G devices. Refer to the Configuration Summary for details.
The SWDIO function is only activated in the presence of a debugger.