2 Cross Compatibility Across Product Lines

Table 2-1. Comparison between the SAM D5x/E5x and PIC32CX SG41/SG60/SG61 Peripherals
PeripheralsSeriesCommentsFunctionalityAlternate Peripherals
SAM D5x/E5xPIC32CX SG41PIC32CX SG60\SG61
ACYesYesYesAvailable in both series.Consists of two individual comparators, each designed to compare two input voltage levels and generate a corresponding digital signal based on the comparison results.NA
ADCYesYesYesAvailable in both series.Converts analog signals into digital values and processes a single independent signal using the Successive Approximation Register (SAR) ADC module.NA
DACYesYesYesAvailable in both series.Converts digital values to analog signals.NA
TCYesYesYesAvailable in both series.Used for generating time delays and can be configured to count events or clock pulses.

Additionally, it supports waveform generation, including frequency generation and pulse-width modulation.

TCC
TCCYesYesYesAvailable in both series.An advanced timer designed to count events or clock pulses, with additional capabilities for waveform generation, including frequency generation and Pulse-Width Modulation (PWM).NA
Ethernet (Note 1)YesYesYesAvailable in the PIC32CX SG41/SG60/SG61 series, whereas in the SAM D5x/E5x series, Ethernet is only present in the SAM E53/54 devices.A widely used technology that supports a 10/100 Mbps Ethernet Media Access (MA) implementation.NA
RTCYesYesYesAvailable in both series.Typically operates continuously to monitor time and can wake up the device from sleep modes. It uses a 32.768 kHz clock source, with a minimum counter tick interval of 30.5 µs and time-out periods of up to 36 hours.NA
Direct Memory Access Controller (DMAC)YesYesYesAvailable in both series.Enables data transfers without CPU intervention, facilitating efficient and high-speed data movement between memory and peripherals. The DMAC manages data transfers between memories and peripherals, thereby offloading these tasks from the CPU.NA
RSTCYesYesYesAvailable in both series.Handles the reset functionality of the microcontroller, restoring the device to its initial state.NA
WDTYesYesYesAvailable in both series.It is designed to monitor the proper functioning of programs, facilitate recovery from error situations, such as runaway or deadlocked code.NA
FREQMYesYesYesAvailable in both series.Used to accurately measure the frequency of a clock source by comparing it with a known reference clock.NA
AESYesYesYesAvailable in both series.Provides symmetric-key encryption algorithms for 128-bit blocks, using the same key for both encryption and decryption.HSM
HSM (Note 2) NoNoYesAvailable only in the PIC32CX SG60/SG61 series.Provides secure key management and cryptographic processing to protect sensitive data. Also ensures the integrity and confidentiality of cryptographic keys while performing encryption, decryption, and authentication functions.NA
TRNGYesYesYesAvailable in both series.Generates unpredictable random numbers that are not generated by an algorithm.NA
PUKCCYesYesYesAvailable in both series.Processes public key cryptography algorithm calculus. The Public Key Cryptography Library (PUKCL) is stored in ROM inside the device. The library can be used in applications to access features of PUKCC, and includes the complete implementation of RSA, DSA, and Elliptic Curve Digital Signature Algorithm (ECDSA).NA
SERCOMYesYesYesAvailable in both series.This peripheral offers hardware support for various communication protocols, including I2C, SPI, LIN, and USART. It is designed to operate in various modes, such as I2C Host, I2C Client, SPI Host, SPI Client, LIN Host, LIN Client, and USART. NA
USB FSYesYesYesAvailable in both series.Communication interface.NA
EICYesYesYesAvailable in both series.Allows external pins to be configured as interrupt lines, with options for masking and generating interrupts on various signal changes. Each pin has a configurable filter to remove spikes and can be set to wake the device from sleep modes. Additionally, a Non-Maskable Interrupt (NMI) is supported, which can override any other interrupt mode.NA
CAN-FDYesYesYesAvailable in the PIC32CX SG41/SG60/SG61 series, whereas in the SAM D5x/E5x, CAN-FD is only present in the SAM E51 and the SAM E54 devices.Enhances the original CAN protocol by increasing the data rate and payload size. Also allows for faster data transmission and supports payloads of up to 64 bytes, compared to the 8-byte limit in classic CAN.NA
I2SYesYesYesAvailable in both series.Provides a bidirectional, synchronous digital audio link with external devices, supporting TDM and PDM interfaces. It features two Clock Units, a Transmit Serializer, and a Receive Serializer, enabling Host, Client, or Controller modes. Also supports 8-bit and 16-bit compact stereo formats.NA
QSPIYesYesYesAvailable in both series.Provides synchronous serial communication with external devices in Host mode, supporting both SPI mode for peripherals, and Serial Memory Mode for Flash memories. It enables code execution directly from serial Flash memory (XIP) without shadowing to SRAM. The QSPI supports high-performance, cost-effective serial Flash memories, offering an alternative to larger parallel Flash memories.NA
SDHCYesYesYesAvailable in both series.An external device or interface that connects to a host system to provide support for SD, SDIO, and e.MMC memory cards. The SD/MMC Host Controller (SDHC) supports e.MMC, SD Memory Card, and SDIO specifications, and is compliant with the SD Host Controller Standard. It includes the register set from the SD Host Controller Simplified Specification V3.00 and additional registers for e.MMC management. The SDHC operates with up to three clocks and requires MCLK and GCLK configuration before use.NA
PCCYesYesYesAvailable in both series.Designed to interface with external systems, including CMOS digital image sensors, ADCs, or DSPs, to capture parallel data.NA
CCLYesYesYesAvailable in both series.Allows users to create custom logic functions tailored to specific application needs. Also enables the integration of user-defined logic directly into the microcontroller, reducing the need for external components and enhancing system performance. NA
PDECYesYesYesAvailable in both series.Consists of Quadrature OR Hall decoder followed by a counter with two compare channels. The counter can be divided into two sections to report both angular position and the number of revolutions.NA
PTCYesYesYesAvailable in both series.Captures signals to detect touch on capacitive sensors. The external capacitive touch sensor is formed on a PCB, with sensor electrodes connected to the PTC's analog front end through the device's I/O pins. Supports both self-capacitance and mutual-capacitance sensors.NA
Note:
  1. In the SAM D5x/E5x family of devices, the Ethernet peripheral is referred to as Gigabit Media Access Controller (GMAC). It is important to clarify that the GMAC in these microcontrollers does not support Gigabit Ethernet functionality. Instead, it supports 10/100 Mbps Ethernet, which includes both 10 Mbps and 100 Mbps data rates. The GMAC designation may be misleading, as it typically implies support for Gigabit Ethernet (1000 Mbps). In this context, it refers to the Ethernet controller's capabilities within the context of the SAM D5x/E5x series, which are limited to Fast Ethernet speeds (10/100 Mbps). For applications that require Gigabit Ethernet, it is necessary to consider other microcontroller families or dedicated Ethernet controllers that explicitly support 1000 Mbps data rates.
  2. For additional information on HSM, contact the Microchip Sales Office. More details of this module are available under a non-disclosure agreement (NDA).
  3. Refer to the Power Supply and Startup Considerations section in the Data Sheets for additional information.