PIC32CX-BZ3/PIC32CX-BZ36 SoC Family Features

Operating Conditions

  • 1.9–3.6V, –40 °C to +125 °C, DC to 64 MHz
    • AEC Q100 Grade 1 qualified
  • 1.9–3.6V, –40 °C to +105 °C, DC to 64 MHz
    • AEC Q100 Grade 2 qualified

Core: 64 MHz ARM® Cortex-M4F

  • XC32 Compiler: 2.97 Coremark®/MHz
  • IAR Compiler: 3.40 Coremark®/MHz
  • 4 KB Combined Instruction Cache and Data Cache
  • 8-Zone Memory Protection Unit (MPU)
  • Thumb®-2 Instruction Set
  • Digital Signal Processing ASE Rev 2
  • Nested Vector Interrupt Controller (NVIC)
  • Embedded Trace Module (ETM) with Instruction Trace Stream
  • CoreSight™ Embedded Trace Buffer (ETB)
  • Trace Port Interface Unit (TPIU)
  • IEEE® 754-Compliant Floating Point Unit (FPU)

Memories

  • 64-KB ROM for Secure Boot
    • Support for asymmetric secure boot
    • Support for Fast Boot mode
  • 3072-Bit of eFuse
    • Secure boot key storage
    • Debug lock
  • 512-KB On-Chip Self-Programmable Flash with:
    • Error Correction Code (ECC)
    • Prefetch module to speed up Flash accesses
    • 20k cycles endurance (100k cycles with erase retry option) and 20 years of data retention support
  • 32-KB Boot Flash Memory (Eight Pages)
    • User boot code configuration
    • Flexible device configuration
  • 96-KB Multi-Port Programmable QoS SRAM Main Memory
    • 32-KB of ECC RAM option
    • 32-KB of RAM space for CoreSight ETB debug usage when enabled
    • Up to 32-KB of SRAM can be retained in Backup mode
  • Up to 4-KB of Tightly Coupled Memory (TCM)

System

  • Power-On Reset (POR) and Brown-Out Reset (BOR)
  • Internal and External Clock Options
  • External Interrupt Controller (EIC)
    • Up to four external interrupts
    • One non-maskable interrupt
  • Extensive Debug and Trace Capabilities
    • 2-pin Serial Wire Debug (SWD) programming and debugging interface
    • ETM trace interface pins for serial wire trace

Supported Connectivity Standards

  • Complies with:
    • Bluetooth® Low-Energy SDK Qualified against Bluetooth® Core 6.0
    • IEEE 802.15.4 MAC/PHY SDK for Custom Protocol Support
    • Zigbee® 3.0
    • Thread 1.4

Power Supply

  • Integrated PMU with:
    • Buck (DC-DC/switching) mode; supports high power (PWM) and low power (PSM) mode
    • MLDO (linear) mode
  • Integrated On-Chip 1.5V Low Dropout (LDO) Regulator for eFuse
  • Integrated On-Chip 1.2V Core Low Dropout (CLDO) Regulator
  • Integrated 16 MHz ±20 ppm Crystal Oscillator (External Low Cost Crystal)
  • POR and BOR on 3.3V and 1.2V Rails
  • Run, Idle, Standby Sleep, Deep Sleep and Extreme Deep Sleep Modes
  • Sleep-Walking Peripherals

2.4 GHz RF Transceiver

  • Integrated 2.4 GHz Ultra Low-Power RF Transceiver Shared Between Bluetooth Low-Energy and IEEE 802.15.4 Modems and Link (MAC) Controllers
  • Integrated TRX Switch and Balun with One Single-Ended RFIO for TX/RX
  • High-Efficiency Switching Power Amplifier (PA)
  • Programmable Transmit Output Power Ranges from -24 dBm to +11 dBm with 1 dB Step Size
  • Supported Data Rates:
    • Bluetooth Low-Energy 6.0: 2 Mbps, 1 Mbps, 500 kbps and 125 kbps
    • IEEE 802.15.4: 250 kbps
    • Proprietary 2.4 GHz: 2 Mbps, 1 Mbps and 500 kbps
Bluetooth
  • Bluetooth Low-Energy 6.0 Certified
  • Typical Receiver Power Sensitivity:
    • -95 dBm for Bluetooth Low-Energy 2 Mbps
    • -98 dBm for Bluetooth Low-Energy 1 Mbps
    • -108 dBm for Bluetooth Low-Energy 125 Kbps
  • Bluetooth Low-Energy Supported Features:
    • Low-energy power control
    • 2M uncoded PHY
    • Long-range coded PHY
    • Channel selection algorithm #2
    • Advertising extensions, offloads CPU with hardware-based scheduler
    • High-duty-cycle non-connectible advertising
    • Data length extensions
    • Secure connections
    • Privacy upgrades
    • Robust to interference with wideband RSSI detector
  • ECDH P256 Hardware Engine for Link Key Generation, when Bluetooth Pairing
  • AES128 Hardware Module for Real-Time Bluetooth Payload Data Encryption
  • Bluetooth Qualification Test Facility (BQTF) Certification
  • Supports SIG Defined/Custom Bluetooth Low-Energy Profiles and Services
  • Estimated Memory Footprint (Numbers are design targets that are subject to change):
    • Bluetooth Low-Energy Stack: ~220-Kbyte code and ~46-Kbyte data (These numbers do not include footprint of application, BLE profiles and BLE services.)
IEEE 802.15.4
  • PLCP Service Data Unit (PSDU) Data Rate: 250 Kbps
  • Programmable RX Mode
    • -103 dBm RX sensitivity for 250 Kbps in Continuous mode
    • -98 dBm RX sensitivity in RPC mode
    • RPC mode provides lower power consumption in RX mode to support California Green Energy Specification at the system level
  • Hardware-Assisted MAC
    • Auto acknowledge
    • Auto retry
    • Channel access back-off
    • Automated FCS check
    • Automatic Address filtering
  • Supports Zigbee 3.0, Thread 1.4 and Additional 802.15.4 Protocol Stacks
  • SFD Detection; Spreading; De-spreading; Framing; CRC-16 Computation
  • Independent TX/RX Buffers for Improved CPU Offloading
    • 128-byte TX and 128-byte RX frame buffer
  • Estimated Memory Footprint (Numbers are design targets that are subject to change.):
    • Zigbee stack: ~240-Kbyte code and ~60-Kbyte data (These numbers do not include footprint of application.)

High-Performance Peripherals

  • 16-Channel Direct Memory Access Controller (DMAC)
    • Built-in CRC with memory CRC generation and monitors hardware support
  • One QSPI
    • Execute-In-Place (XIP) support
    • Dedicated AHB memory zone

System Peripherals

  • 32-Channel Event System
    • All channels can be connected to any event generator
    • All channels provide a pure asynchronous path
    • Twelve channels support synchronous and re-synchronous
  • Two Serial Communication Interfaces (SERCOM), each Configurable to Operate as:
    • Universal Synchronous Asynchronous Receiver Transmitter (USART) with full-duplex and single-wire half-duplex configuration
    • ISO7816
    • I2C up to 1 MHz
    • LIN Commander/Responder
    • RS485
    • SPI inter-byte space
  • One SERCOM Configured as I2C-Only Interface
  • Eight 16-Bit Timers/Counters (TC), Each Configurable as:
    • 16-bit TC with two compare/capture channels
    • 8-bit TC with two compare/capture channels
    • 32-bit TC with two compare/capture channels by paring two TCs
    • TCx supports 16 PWM channel outputs and TCCx supports 14 PWM channel outputs
  • Two 24-Bit Timer/Counters for Control (TCC) with Extended Functions:
    • Up to six compare channels with optional complementary output
    • Generation of synchronized Pulse Width Modulation (PWM) pattern across port pins
    • Deterministic fault protection, fast decay and configurable dead-time between complementary output
    • Dithering to increase resolution up to 5 bits and reduce quantization error
  • One 16-Bit Timer/Counters for Control (TCC) with Extended Functions:
    • Up to two compare channels with optional complementary output
  • 32-Bit Real Time Counter (RTCC) with Clock/Calendar Function
    • Up to four wake-up pins with tamper detection and debouncing filter
  • Watchdog Timer (WDT) with Window Mode
  • Deadman Timer (DMT)
  • Frequency Meter (FREQM)
  • Configurable Custom Logic (CCL) with Two Look-Up Table (LUT)
  • One 7-Bit General Purpose Digital-to-Analog Converter (DAC)
  • One 12-Bit, 1 Msps ADC SAR Core with Up to Eight Channels:
    • Differential and single-ended input
    • Automatic offset and gain error compensation
  • Up to Two Analog Comparator (AC) with Window Compare Function
  • Up to Eight Capacitive Voltage Divider (CVD) Channels for Touch Button Support (Using Shared ADC SAR Core)
  • One Temperature Sensor (Die Temperature) Built into Wireless Subsystem

Cryptography

  • High-Performance Cryptographic Accelerators for Advanced Encryption Standard (AES), Secure Hash Algorithm (SHA), RSA and ECC
  • NIST 800-90B–Compliant True Random Number Generator (TRNG)
  • Integrated Scatter Gather DMA

Advanced Analog

  • 12-Bit ADC
    • Up to eight analog channels (PIC32CX5109BZ31048/PIC32CX5109BZ36048)
    • Up to four analog channels (PIC32CX5109BZ31032/PIC32CX5109BZ36032)
  • CVD Touch Support Using Shared ADC
    • Up to eight CVD channels (PIC32CX5109BZ31048/PIC32CX5109BZ36048)
    • Up to four CVD channels (PIC32CX5109BZ31032/PIC32CX5109BZ36032)
  • 7-Bit General-Purpose DAC
Oscillators
  • 16 MHz, ±20 PPM Crystal/Resonator Oscillator or External Clock (POSC) for 2.4 GHz RF Transceiver
  • Shared System PLL with RF Subsystem
  • 32.768 kHz Ultra-Low-Power Internal Oscillator (LPRC)
  • Higher Accuracy 32.768 kHz, ±250 ppm Clock Options
    • 32 kHz clock derived from POSC
    • 32.768 kHz crystal/resonator oscillator (SOSC)
    • External 32.768 kHz clock source
  • 8 MHz Internal RC Oscillator (FRC)

I/O

  • Peripheral Pin Select (PPS) Support
  • High-Current Sink/Source on Most I/O Pins
  • Configurable Open-Drain Output on Digital I/O Pins
  • Up to 27 Programmable I/O Pins (PIC32CX5109BZ31048/PIC32CX5109BZ36048)
  • Up to 14 Programmable I/O Pins (PIC32CX5109BZ31032/PIC32CX5109BZ36032)
DC Specification
    • Boot time(1)(2): ~7.1 ms
Package
  • PIC32CX5109BZ31048/PIC32CX5109BZ36048
    • 48-pin QFN
    • Size: 6 mm x 6 mm x 1 mm
  • PIC32CX5109BZ31032/PIC32CX5109BZ36032
    • 32-pin QFN
    • Size: 5 mm x 5 mm x 1 mm
Note:
  1. The numbers are design targets only and subject to change after device characterization is complete.
  2. The time from Reset release until control is transferred to the Flash without code authentication.