4 dsPIC33CH Dual Core User Guide

This user’s guide provides an overview of the dsPIC33CH family device architecture, process involved in configuring Main and Secondary project using MPLAB® Code Configurator (MCC) Melody.

4.1 dsPIC33CH Architecture Overview and Features

Dual Independent Cores
- Main Core intended for communications and supervisory control
- High-speed Secondary Core intended for time-critical control applications such as SMPS or motor control
- Secondary core are of two types - Secondary core with PRAM and Secondary Core with it's own FLASH
Each core has its own peripheral set
Inter-Core communications through low-latency mailboxes
Configurable cross-core fault and interrupt signals
Reconfigurable pins through Microchip's Peripheral Pin Select

Note: All the images available in the document are for reference only, for more information refer respective device datasheet.

4.2 dsPIC33CH Programming Process

To Configure a Dual Core device which has Secondary Core with PRAM, two projects must be set up, one for the Main Core and one for the Secondary Core. These two projects are incorporated into one hex file by MPLAB^® X IDE. The combined project file is programmed into the device's Flash memory. During start-up, the device will copy the Secondary project's instructions from FLASH into PRAM for execution by the Secondary Core. At device start-up, before the user application runs, the User must call Secondary start-up code which copies the secondary application from program flash to the high-speed PRAM for execution by the Secondary Core.

To Configure a Dual Core device which has Secondary Core with FLASH, two projects must be set up, one for the Main Core and one for the Secondary Core. The application code of each Core can be programmed individually as two seperate HEX files. The Main Project has to be programmed first and then followed by Secondary Project. During start-up, the Main device has the control to start Secondary device.

This page is part of a tutorial which provides information on using MCC to customize Main and Secondary Cores to leverage the maximum potential of a Dual Core device. To support independent code development for each Core, MCC can be started on either the Main or Secondary Core's MPLAB X IDE project.

Hereafter, Main and Secondary Core's MPLAB X IDE project will be referred to as the Main project and the Secondary project, respectively.

Steps to Configure Dual Core device through MCC:

Create Main Project in MPLABX and load MCC.
Configure the Secondary Core settings in Main Project .
Export the Secondary Core related MCC settings from the Main project and save as JSON file.
Create Secondary Project in MPLABX and load MCC.
In the Main Core of Secondary project, import the JSON file which has Secondary Core related MCC settings done in the Main project. Configure other settings.
Add the Secondary Project to the Main Project.

Note: Step 6 is not applicable for dual Core devices which has Secondary Core with it's own FLASH. Refer device datasheet for more details.

In a Main project, Secondary Core related fuses need to be configured. This information needs to be shared with the Secondary project and is facilitated by exporting and importing configuration-related information using MCC. The sharing of information from the Main project to the Secondary project facilitates MCC to display the settings in the Secondary project, which user configures in the Main project. If this information is not shared, MCC will display the default setting values in the Secondary project. These settings are shown to help the user in independent code development. Any modification made to the Secondary Core fuses in the Main project, the settings have to be shared with the Secondary project, and MCC displays these settings in the Secondary project in synchronous with the Main project.

4.3 Configuring the dsPIC33CH Main Project

Setting up the Main project involves selecting the Secondary core and configuring it. The following sections explain the steps involved in setting up the Main project.

Note: Secondary's Oscillator, ICD, WDT and DMT related configurations are not applicable for dual core devices which has Secondary Core with it's own FLASH and all these are configurable in Secondary Project itself.

Secondary Core Selection and Configurations

To select the Secondary core for configuration:

Create an MPLAB^® X IDE project for the Main device selected from the dsPIC33CH family.
Launch MLPAB^® Code Configurator (MCC) by
- Clicking on the MCC icon in MPLAB X IDE, or
- Navigating to Tools > Embedded > MPLAB Code Configurator v5: Open/Close.
Secondary Core appears in the Project Resource area of MCC in a Main project.
In Secondary Core1 module UI, Enable Configure Secondary Core.

Configuring the Secondary Core settings

Config bits settings are available for the secondary peripherals listed .

Secondary's Clock
MSI
Secondary's ICD
Secondary's Watchdog Timer
Secondary's Deadman Timer
Secondary's Alternate I2C1 Pin Mapping
Secondary's SPI1 Pin Mapping
Secondary's Context Interrupts
Assigning Output Pin Ownership to Secondary Core

Note: Only MSI Configurations and Output Pin Ownership are configurable as part of Secondary Core UI for dual core devices which has Secondary core with it's own FLASH. Refer device datasheet for more details.

Naming the Secondary Project

The Secondary core's MPLAB X IDE project name is used to include a Secondary project image header in the Main project generated code.

Configuring Secondary's Oscillator

These settings in MCC allows to configure the required Clock Source and Clock Switching for the Secondary core.


Clock Source	This allows to select the required clock source such as FRC Oscillator, Primary Oscillator, External Clock, LPRC Oscillator, BFRC Oscillator and Digitally Controlled Oscillator depending on the application. The clock source options may vary with the device used.
Enable Clock Switching	This allows to enable the clock switching feature.
Enable Fail-Safe	This allows to enable or disable the fail-safe monitor feature. When enabled, the fail-safe monitor allows the device to continue to operate even in the event of an oscillator failure.

Configuring MSI

The MSI is the data gateway between the Main core and the Secondary core, each of which operates within independent clock domains. The MSI module is primarily intended to move data between the cores.

The Mailbox Configuration table provided in MCC allows to:

Configure handshake protocols by selecting the buffer size. Based on the selected buffer size, MCC allocates a set of mailbox registers to the specific protocol.
Define the direction of data flow, like from M → S (Main to Secondary) or S → M (Secondary to Main).
Optionally, assign a custom name to each protocol. This custom name is used as part of enum list in generated MCC code.

Configuring Secondary's In-Circuit Debugging (ICD)

These settings in MCC allow to select pins used for in-circuit debugging of the Secondary core. User must select Programming Clock (PGC) and Programming Data (PGD) pins based on the hardware used.

Configuring Secondary's Watchdog Timer

These settings allows to configure the Secondary core's watchdog timer:

Configuring Secondary's Deadman Timer

These settings allows to configure the Secondary core's deadman timer:

Configuring Secondary's Alternate I2C Pins

These settings allows to configure the Alternate I2C Pins for Secondary's I2C:

Configuring Secondary SPI Pin Mapping

These settings allows to configure the Secondary SPI Pin mapping:

Configuring Secondary Context Interrupts

These settings allows to configure the Secondary Alternate Working registers to a specific Interrupt Priority Level (IPL1 through IPL6) by configuring the CTXTx[2:0] bits

Assigning Output Pin ownership to the Secondary Core

Main and Secondary core share the IO ports on the device. The input feature is available to both the cores, whereas the output feature is decided as per the ownership fuses. By default, the output ownership of a pin resides with the Main core. If the Secondary core needs the output ownership of a particular pin, the ownership configurations have to be changed. Both the Main and the Secondary core can monitor a pin as an input as long as the monitoring is of the same type—digital or analog. These settings allows to configure the Output Pin Ownership of all available pins to either Main Core or Secondary Core:

4.4 Export Secondary settings from Main Project

In Main project, the configuration fuses related to Secondary Core are configured. This setting information needs to be communicated to the Secondary project and is facilitated by exporting and importing the settings.

To export the settings, click on the Save File button. The file should be saved in JSON format which resides in the selected file path while saving config file.

Note:

For dual Core devices which has Secondary Core with it's own FLASH, Only MSI Configurations and Output Pin Ownership information is exported.

4.5 Import and Configure the Secondary Project

Create an MPLAB^® X IDE project with the Secondary device selected from the dsPIC33CH family.
Launch MCC by:
- Clicking on the MCC icon in MPLAB X IDE, or
- Launch MPLAB Code Configurator .
Main Core appears as a System Resource in the Secondary project.

The Main core contains the configuration fuses of the Secondary core, which are configured in the Main project. To display the settings selected in the Main project, the settings need to be imported from the Main project. For dual core device which has Secondary Core with FLASH, The Main Core contains only MSI configuration fuses and Output pin Ownership fuses of Secondary core.

Import secondary settings

Fuses related to the Secondary core are configured in the Main project and MCC Melody facilitates exporting and importing these configuration details to the Secondary project. Exporting settings from the Main project is explained in the "4.4 Export Secondary settings from Main Project" section of the page.

To import the settings, click on the Load File button in the Main Core. The settings are saved in the MainCoreConfig.JSON file, which resides in the file path which has been considered at the time of export configurations. Select the file for import.

Upon Import:

All settings related to the Secondary core that were configured in the Main project get updated to the Secondary project.
The updated settings become non editable fields. Only MSI interrupts can be enabled manually.
Note: For dual core devices which has Secondary Core with it's own FLASH, Upon Import Only MSI Configurations and Pin Ownership information gets updated in secondary project(Main core).

Configuring MSI

Upon Import, MSI controls become non-editable in the Secondary project. All the settings related to MSI have to be done in the Main project and must be imported from the Main project.

Configuring Secondary ICD, OSCILLATOR, Watchdog Timer, Deadman Timer, Alternate I2C Pins, SPI pin mapping and Context Interrupts

Note: For dual core devices which has Secondary Core with it's own FLASH, Secondary ICD, OSCILLATOR, Watchdog Timer, Deadman Timer, Alternate I2C Pins, SPI pin mapping and Context Interrupts has to be configured in Secondary Project itself. Since config bits related to these modules resides in Secondary Core.

On the first launch of MCC Melody, the configurations related to Secondary ICD, Oscillator, Watchdog Timer, Deadman Timer, Alternate I2C Pins, SPI pin mapping and Context Interrupts have default values in the Secondary project. If any change is required, user have to modify these configurations in the Main project, save the settings and import the modified settings to the Secondary project. After importing the settings, user will see the configurations made in the Main project, which are applicable to the Secondary project.

Upon Import, user can view Output pin ownership information as part of Main Core Output pin Ownership panes .

4.6 Demo

This demo illustrates the process involved in using MPLAB® Code Configurator (MCC) Melody to configure the System, MSI module, Output pins ownership, Export and Import the Secondary core related MCC settings done in the Main project to the Secondary project of a dual-core device.

Refer Github Example Code - github.com/microchip-pic-avr-examples/dspic33ch-curiosity-msi-mailbox-demo