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ATmega3208/3209 Data Sheet ATmega3208/3209
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ATmega3208
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27
CCL - Configurable Custom Logic
27.3
Functional Description
27.3.1
Operation
ATmega3208/3209
Introduction
megaAVR® 0-series Overview
Features
1
Silicon Errata and Data Sheet Clarification Document
2
Block Diagram
3
Pinout
4
I/O Multiplexing and Considerations
5
Conventions
6
AVR® CPU
7
Memories
8
Peripherals and Architecture
9
NVMCTRL - Nonvolatile Memory Controller
10
CLKCTRL - Clock Controller
11
SLPCTRL - Sleep Controller
12
RSTCTRL - Reset Controller
13
CPUINT - CPU Interrupt Controller
14
EVSYS - Event System
15
PORTMUX - Port Multiplexer
16
PORT - I/O Pin Configuration
17
BOD - Brown-out Detector
18
VREF - Voltage Reference
19
WDT - Watchdog Timer
20
TCA - 16-bit Timer/Counter Type A
21
TCB - 16-Bit Timer/Counter Type B
22
RTC - Real-Time Counter
23
USART - Universal Synchronous and Asynchronous Receiver and Transmitter
24
SPI - Serial Peripheral Interface
25
TWI - Two-Wire Interface
26
CRCSCAN - Cyclic Redundancy Check Memory Scan
27
CCL - Configurable Custom Logic
27.1
Features
27.2
Overview
27.3
Functional Description
27.3.1
Operation
27.3.1.1
Enable-Protected Configuration
27.3.1.2
Enabling, Disabling, and Resetting
27.3.1.3
Truth Table Logic
27.3.1.4
Truth Table Inputs Selection
27.3.1.5
Filter
27.3.1.6
Edge Detector
27.3.1.7
Sequencer Logic
27.3.1.8
Clock Source Settings
27.3.2
Interrupts
27.3.3
Events
27.3.4
Sleep Mode Operation
27.4
Register Summary
27.5
Register Description
28
AC - Analog Comparator
29
ADC - Analog-to-Digital Converter
30
UPDI - Unified Program and Debug Interface
31
Instruction Set Summary
32
Electrical Characteristics
33
Typical Characteristics
34
Ordering Information
35
Package Drawings
36
Data Sheet Revision History
The Microchip Website
Product Change Notification Service
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Product Identification System
Microchip Devices Code Protection Feature
Legal Notice
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Quality Management System
Worldwide Sales and Service
27.3.1 Operation
