1 Introduction

The audio Class D amplifier (CLASSD) implemented in Microchip microprocessors is a fully digital pulse-width-modulated (PWM) stereo output amplifier. It features a digitally-controlled attenuator for gain control, a 3-band equalizer and a de-emphasis filter.

On the input side, the CLASSD 16-bit digital input is compatible with the most common audio data rates: 8, 16, 32, 48 and 96 kHz (internally oversampled to 768 kHz), as well as 22.05, 44.1 and 88.2 kHz (internally oversampled to 705.6 kHz).

On the output side, the CLASSD PWM output can drive either:
  • high-impedance single-ended or differential output loads (ΔΣ audio DAC applications) or
  • external MOSFETs through an integrated non-overlapping circuit (power amplifier applications).
Figure 1-1. CLASSD Block Diagram

Table 1-1. CLASSD Output Pin Assignments Versus Application Use Cases
PinExternal MOS Driver (NON_OVERLAP = 1)Direct Load (NON_OVERLAP = 0)Type
Full H-Bridge

(PWMTYP = 1)

Half H-Bridge

(PWMTYP = 0)

Differential Load

(PWMTYP = 1)

Single-Ended Load


(PWMTYP = 0)

Use Case

1

Use Case

2

Use Cases

3A & 3B

Use Cases

4A & 4B

CLASSD_L0gate_pmos_leftpgate_pmos_leftleftpleftOutput
CLASSD_L1gate_nmos_leftpgate_nmos_leftNot used (fixed to 0)Not used (fixed to 0)Output
CLASSD_L2gate_pmos_leftnNot used (fixed to 1)leftnNot used (fixed to 0)Output
CLASSD_L3gate_nmos_leftnNot used (fixed to 1)Not used (fixed to 0)Not used (fixed to 0)Output
CLASSD_R0gate_pmos_rightpgate_pmos_rightrightprightOutput
CLASSD_R1gate_nmos_rightpgate_nmos_rightNot used (fixed to 0)Not used (fixed to 0)Output
CLASSD_R2gate_pmos_rightnNot used (fixed to 1)rightnNot used (fixed to 0)Output
CLASSD_R3gate_nmos_rightnNot used (fixed to 1)Not used (fixed to 0)Not used (fixed to 0)Output
Note: The microprocessor’s PIO controllers must be programmed first to assign the CLASSD pins to their peripheral functions.