25.3.3.1.1 Clock Operation
The XCK pin direction controls whether the transmission clock is an input (Client mode) or an output (Host mode). The corresponding port pin direction must be set to output for Host mode or input for Client mode (PORTx.DIRn). The data input (on RXD) is sampled at the XCK clock edge opposite to the edge on which data are transmitted (on TXD), as shown in the figure below.
The I/O pin can be inverted by writing
‘1’ to the Inverted I/O Enable (INVEN) bit in the Pin n Control
register of the port peripheral (PORTx.PINnCTRL). When the inverted I/O setting is used for
the corresponding XCK port pin, the XCK clock edges used for sampling RxD and transmitting
on TxD can be selected. If the inverted I/O is disabled (INVEN = 0), the
rising XCK clock edge represents the start of a new data bit, and the received data are
sampled on the falling XCK clock edge. If the inverted I/O is enabled (INVEN =
1), the falling XCK clock edge represents the start of a new data bit,
and the received data are sampled on the rising XCK clock edge.
