1.4.1 The I2CxADR0/1/2/3 Registers Have Incorrect Reset Value
The I2CxADR0/2 registers reset to 0xFF when the I2CxMD is enabled
instead of 0x00. The I2CxADR1/3 registers reset to
0xFE when the I2CxMD is enabled instead of
0x00.
Work around
None.
Affected Silicon Revisions
| A4 | A5 | D1 | D3 | E0 |
| X |