4.2 Single-Wire Interface

The SHA104-TFLXAUTH operates as a client device and utilizes a single‑wire digital serial interface to communicate with a host controller. The host device controls all read and write operations to the client devices on the serial bus. The device supports the High-Speed mode. This interface is designed to be compatible at the protocol level with the Microchip AT21CS01 and AT21CS11 Serial EEPROM operating at High-Speed mode.

The device utilizes an 8-bit data structure. Data are transferred to and from the device via the single‑wire serial interface using the Serial Input/Output (SI/O) pin. Power to the device can also be provided via the SI/O pin, thus only the SI/O pin and the GND pin are required for device operation. Data sent to the device over the single‑wire bus are interpreted by the state of the SI/O pin during specific time intervals or slots. Each time slot is referred to as a bit frame and lasts t_BIT in duration. The host initiates all bit frames by driving the SI/O line low. All commands and data information are transferred with the MSb first.

During bus communication, one data bit is transmitted in every bit frame, and after eight bits (one byte) of data are transferred, the receiving device must respond with either an Acknowledge (ACK) or a No Acknowledge (NACK) response bit during a ninth bit window. There are no unused clock cycles during any read or write operation, so there must not be any interruptions or breaks in the data stream during each data byte transfer and ACK or NACK clock cycle. In the event where an unavoidable system interrupt is required, refer to the requirements outlined in 4.2.2.7 Communication Interruptions.