35.3.2.6 Internal Timer

When an op amp is enabled, it takes some time for the op amp to start up and begin functioning correctly. There are two components to this start-up time, warmup time and settling time:
  1. The warmup time is the time required to elapse before the internal circuitry in the op amp stabilizes. The warmup time is documented in the Electrical Characteristics section. It does not depend on external circuitry.
  2. The settling time is the additional time allowed for the op amp output to settle and become stable after the warmup time is completed. It depends on a variety of factors, including the strength of the output driver and the load on the op amp output.
Each op amp has an internal timer that is used to determine the delay between op amp enable and the indication that it is ready to use. For the internal timer to function correctly, two bit fields must be configured:
  1. The timebase of the OPAMP peripheral must be configured by writing to the Timebase (TIMEBASE) bit field in the Timebase (OPAMP.TIMEBASE) register. Determine how many cycles of the peripheral clock (CLK_PER) are equal to 1 μs. If that number is an integer, subtract one from it and write it to the TIMEBASE bit field. If that number is not an integer, round it down to an integer and write it to the TIMEBASE bit field. For example, if the peripheral clock period is 260 ns, then 3.85 cycles are equal to 1 μs. Since 3.85 is not an integer, it should be rounded down to 3 and then written to the TIMEBASE bit field.
  2. The settling time of OPn must be configured by writing to the Settle Timer (SETTLE) bit field in the Op Amp n Settle Timer (OPAMP.OPnSETTLE) register. Since the settling time depends on a variety of factors, including the load on the op amp, it may not be known until the later stages of design and development. If the settling time is unknown, the maximum value of ‘0x7F’ (127 μs) should be written to the SETTLE bit field.

After the user-programmed settling time has elapsed, the SETTLED bit is changed from ‘0’ to ‘1’ in OPnSTATUS. If the op amp is in EVENT_ENABLED mode, the READYn event is also issued.

If the OPnINMUX or OPnRESMUX register is changed while the OPn output is enabled, a glitch will occur on the output signal due to the opening and closing of analog switches, and some time will elapse before the output settles to the new value. For this reason, the settle timer restarts whenever there is a write to the OPnINMUX or OPnRESMUX registers.

The settle timer also restarts whenever there is a write to the OPnCTRLA register.