Figure 39-135. Falling Edge
Response Time vs. VDD (VCM =
VDD /2, CTRLA.POWER =
0x00
)
Figure 39-136. Rising Edge
Response Time vs. VDD (VCM =
VDD /2, CTRLA.POWER =
0x00
)
Figure 39-137. Falling Edge
Response Time vs. VDD (VCM =
VDD /2, CTRLA.POWER =
0x01
)
Figure 39-138. Rising Edge
Response Time vs. VDD (VCM =
VDD /2, CTRLA.POWER =
0x01
)
Figure 39-139. Falling Edge
Response Time vs. VDD (VCM =
VDD /2, CTRLA.POWER =
0x02
)
Figure 39-140. Rising Edge
Response Time vs. VDD (VCM =
VDD /2, CTRLA.POWER =
0x02
)
Figure 39-141. Input Offset
vs. Common Mode Voltage (VDD = 2.0V)
Figure 39-142. Input
Hysteresis vs. Common Mode Voltage (VDD =
2.0V)
Figure 39-143. Input Offset
vs. Common Mode Voltage (VDD = 3.0V)
Figure 39-144. Input
Hysteresis vs. Common Mode Voltage (VDD =
3.0V)
Figure 39-145. Input Offset
vs. Common Mode Voltage (VDD = 5.5V)
Figure 39-146. Input
Hysteresis vs. Common Mode Voltage (VDD =
5.5V)