Figure 39-68. Fall Time vs.
VDD (PORTCTRL.SRL =
0x00)
|
Figure 39-69. Fall Time vs. VDD (PORTCTRL.SRL =
0x01)
|
Figure 39-70. Rise Time vs. VDD (PORTCTRL.SRL =
0x00)
|
Figure 39-71. Rise Time vs. VDD (PORTCTRL.SRL =
0x01)
|
Figure 39-72. Input Pin with
Schmitt Trigger - Maximum VIL vs.
VDD
|
Figure 39-73. Input Pin with
Schmitt Trigger - Minimum VIH vs.
VDD
|
Figure 39-74. Input Pin with
Schmitt Trigger - Hysteresis vs. VDD
| |
Figure 39-75. Input Pin with
I2C Trigger - Maximum VIL vs.
VDD
|
Figure 39-76. Input Pin with
I2C Trigger - Minimum VIH vs.
VDD
|
Figure 39-77. Input Pin
SMBus - Maximum VIL vs. VDD
|
Figure 39-78. Input Pin
SMBus - Minimum VIH vs. VDD
|
Figure 39-79. Reset Pin
VIL vs. VDD
|
Figure 39-80. Reset Pin
VIH vs. VDD
|
Figure 39-81. Weak Pull-Up
Current vs. VDD
| |
Figure 39-82. Output Pin -
Maximum VOL vs. Current, VDD =
1.8V
|
Figure 39-83. Output Pin -
Minimum VOH vs. Current, VDD =
1.8V
|
Figure 39-84. Output Pin -
Maximum VOL vs. Current, VDD =
3.0V
|
Figure 39-85. Output Pin -
Minimum VOH vs. Current, VDD =
3.0V
|
Figure 39-86. Output Pin -
Maximum VOL vs. Current, VDD =
5.5V
|
Figure 39-87. Output Pin -
Minimum VOH vs. Current, VDD =
5.5V
|
| |
