38.5.8 ADC

Table 38-24. ADC Accuracy Specifications
Operating Conditions: V_DD = V_DDIO2 = 3.0V T_A = 25ºC
Symbol	Description	Min.	Typ. ✝	Max.	Unit	Conditions
N_R	Resolution	—	—	12	bit
E_INL	Integral nonlinearity error	-1.5	0.1	1.5	LSb	V_DD = V_REF = 3.0V
E_DNL	Differential nonlinearity error⁽¹⁾	-1	0.1	1	LSb	V_DD = V_REF = 3.0V
E_OFF	Offset error	-5	2.5	5	LSb	V_DD = V_REF = 3.0V
E_GAIN	Gain error	-5	1.5	5	LSb	V_DD = V_REF = 3.0V
E_ABS	Absolute error	—	—	—	LSb	V_DD = V_REF = 3.0V
V_ADCREF	ADC reference voltage	1.8	—	V_DD	V
V_AIN	Full-scale range	GND	—	V_ADCREF	V
Z_AIN	Recommended impedance of analog voltage source	—	1	—	kΩ
R_VREFA	ADC voltage reference ladder impedance⁽²⁾	—	50	—	kΩ
✝ Data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V unless otherwise specified. These parameters are for design guidance only and are not tested. Note: The ADC conversion result never decreases with an increase in the input and has no missing codes. This is the impedance seen by the VREFA pin when the external reference is selected.

Table 38-25. ADC Conversion Timing Specifications
Symbol	Description	Min.	Typ. ✝	Max.	Unit
T_{CLK_ADC} *	ADC clock period	0.5	—	8	μs
t_CNV	Conversion time	—	13.5T_{CLK_ADC} + 2T_{CLK_PER}	—
t_ACQ	Acquisition time	—	2T_{CLK_ADC}	—	μs
f_ADC *	Sample rate	8	—	130	ksps
t_S	Sampling time	—	2T_{CLK_ADC}	—
t_SENSE *	Delay for changing MUXPOS to TEMP	—	40	—	μs
t_{ADC_INIT} *	Initialization time	—	6	—	μs
✝ Data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only. * These parameters are characterized but not tested in production.