14.3.2.1.1 Power-on Reset (POR)
The Power-on Reset (POR) aim is to ensure a safe start-up of logic and memories. An on-chip detection circuit is always enabled and generates this. The POR is activated when the VDD rises and gives active Reset as long as VDD is below the POR threshold voltage (VPOR). The Reset will last until the Start-up and Reset initialization sequence is finished. Fuses determine the Start-Up Time (SUT). Reset is activated again, without delay, when VDD falls below the detection level (VPORR).