1.29.5 Clock Generator (CLOCK)

The SAM C20/C21 family contain a sophisticated clocking system, which is designed to give the maximum flexibility to the user application. This system allows a system designer to tune the performance and power consumption of the device in a dynamic manner, to achieve the best trade-off between the two for a particular application.

Clock sources

The SAM devices have a number of master clock source modules, each of which being capable of producing a stabilized output frequency, which can then be fed into the various peripherals and modules within the device. Possible clock source modules include internal R/C oscillators as well as external crystal oscillators and/or clock inputs.

CPU / Bus Clocks

The Main Clock (MCLK) controls the synchronous clock generation of the device. Using a clock provided by the Generic Clock Module (GCLK_MAIN), the Main Clock Controller provides

synchronous system clocks to the CPU and the modules connected to the AHBx and the APBx bus. To save power, the input clock to one or more peripherals on the AHB and APBx buses can be masked away - when masked, no clock is passed into the module. Disabling of clocks of unused modules will prevent all access to the masked module, and will reduce the overall device power consumption.

Generic Clock Generators

The Generic Clock controller (GCLK) are used to provide clocks to the various peripheral clock domains in the device in a standardized manner. One or more master source clocks can be selected as the input clock to a Generic Clock Generator, which can prescale down the input frequency to a slower rate for use in a peripheral.

Generic Clock Channels

To connect a Generic Clock Generator to a peripheral within the device, a Generic Clock Channel is used. Each peripheral or peripheral group has an associated Generic Clock Channel, which serves as the clock \input for the peripheral(s). To supply a clock to the peripheral module(s), the associated channel must be connected to a running Generic Clock Generator and the channel enabled.

Using The Library

The Clock peripheral library initializes the clock system as configured by the user in the MHC easy view.

Library Interface

Clock Generator peripheral library provides the following interfaces:

Functions

Name	Description
CLOCK_Initialize	Initializes all the modules related to the system clock
OSCCTRL_CallbackRegister	Register the function to be called when an External Oscillator or DPLL event is generated
OSC32KCTRL_CallbackRegister	Register the function to be called when the 32KHz External Oscillator has failed
MCLK_CallbackRegister	Register the function to be called when the MCLK is ready

Data types and constants

Name	Type	Description
OSCCTRL_CFD_CALLBACK	Typedef	Defines the data type and function signature for the External Oscillator callback function
OSC32KCTRL_CFD_CALLBACK	Typedef	Defines the data type and function signature for the External 32KHz Oscillator clock failure detection callback function
MCLK_CKRDY_CALLBACK	Typedef	Defines the data type and function signature for the Main Clock Ready callback function