1.12.16 Output Compare (OCMP)

The Output Compare module is primarily used to generate a single pulse or a series of pulses in response to selected time base events. Each output compare module can select between one of six 16-bit timers for the time base, or two of six 16-bit timers together to form a 32-bit timer. The selected timer can use either an internal or external clock.

Each Output Compare module has the following modes of operation (OCM bit field): Single Compare Match Mode:

• With output drive high - Initial state of the pin is low. OCx pin becomes high on compare match.

• With output drive low - Initial state of the pin is high. OCx pin becomes low on compare match.

• With output drive toggles - OCx pin toggles on compare match.

Dual Compare Match Mode:

• With single output pulse - OCx pin becomes high on compare match and becomes low on secondary compare match

• With continuous output pulses - OCx pin becomes high on compare match and becomes low on secondary compare match continuously. Compare time base will count up to period value defined in the selected timer source module.

Pulse Width Modulation Mode:

• PWM without fault protection input - PWM duty cycle is defined by secondary compare register, OCxRS and PWM period is defined by selected timer period register (PRy)

• PWM with fault protection input - PWM duty cycle is defined by secondary compare register, OCxRS and PWM period is defined by selected timer period register (PRy). PWM outputs are shut asynchronously when fault condition is detected.

int main ( void )
{
    /* Initialize all modules */
    SYS_Initialize ( NULL );
    
    /* Active low output */
    OCMP1_Enable();
    /* Active high output */
    OCMP2_Enable();
    /* toggled output */
    OCMP3_Enable();

    TMR2_Start();    

    while ( true )
    {
        /* Maintain state machines of all polled MPLAB Harmony modules. */
        SYS_Tasks ( );
    }

    /* Execution should not come here during normal operation */

    return ( EXIT_FAILURE );
}