1.3 Programmer’s Model

Figure 1-3 shows the programmer’s model diagrams for the dsPIC33A family of devices.

Figure 1-3. dsPIC33A Programmer’s Model
Note:
  1. W15[1:0] and SPLIM[1:0] always = 0b00.
  2. PC[0] always = 0b0.
Table 1-1. Programmer’s Model Register Descriptions
RegisterDescription
CORCONCPU Core Configuration register
PC24-Bit Program Counter
RCOUNTREPEAT Loop Counter register
SPLIMStack Pointer Limit Value register
SRALU and DSP Engine STATUS Register
W0-W15Working register array
ACCA, ACCB72-Bit DSP Accumulators