6.2 Instruction Set Summary Table
The complete 16-bit DSC device instruction set is summarized in Table 6-1. This table contains an alphabetized listing of the instruction set. It includes instruction assembly syntax, description, size (in 24-bit words), execution time (in instruction cycles), affected Status bits and the page number where the detailed description can be found. The dsPIC33A CPU Instruction Status Flag Operations section identifies the symbols that are used in the Table 6-1.
Assembly Mnemonic1 | Description | Words | Cycles | C | N | OV | Z | OA | OB | SA | SB(1) | OAB | SAB(1) |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
ADD | f + Wn or Wn = f + Wn | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
Wn = Wn + lit5 | 0.5 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Wn = Wn + lit16 | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Wd = Wb + Ws | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Wd = Wb + lit7 (literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Add Accumulators | 0.5 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ | |
16-bit Signed Add to Accumulator | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ | |
ADDC | f = f + Wn + (C) or Wn = f + Wn + (C) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — |
Wn = Wn + lit16 + (C) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
Wd = Wb + Ws + (C) | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
Wd = Wb + lit7 + (C) (literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
AND | f = f .AND. Wn or Wn = f .AND. Wn | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wn = Wn .AND. lit16 | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
Wd = Wb .AND. Ws | 0.5/1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
Wd = Wb .AND. lit7 (literal zero-extended) | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
AND1 | Wd = Wb .AND. lit7 (literal ones-extended) | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — |
ASR | f = Arithmetic Right Shift f by 1 or Wn = Arithmetic Right Shift f by 1 | 1 | 1 | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | — |
Wd = Arithmetic Right Shift Ws by 1 | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | — | |
Wnd = Arithmetic Right Shift Ws by Wb | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | — | |
Wnd = Arithmetic Right Shift Ws by lit5 | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | — | |
ASRM | Wnd = Arithmetic Right Shift Ws by lit5, then logically OR with next LS-word | 1 | 2 | — | ⇕ | — | ⇓ | — | — | — | — | — | — |
Wnd = Arithmetic Right Shift Ws by Wb, then logically OR with next LS-word | 1 | 2 | — | ⇕ | — | ⇓ | — | — | — | — | — | — | |
BCLR | Bit Clear f | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Bit Clear Ws | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — | |
BFEXT | Bit Field Extract from Ws to Wb | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Bit Field Extract from f to Wb | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
BFINS | Bit Field Insert from Wb into Ws | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Bit Field Insert from Wb into f | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
Bit Field Insert lit8 into Ws | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
BOOTSWP | Swap Active and Inactive address space | 1 | 2 | — | — | — | ⇕ | — | — | — | — | — | — |
BRA | Branch Unconditionally | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Computed Branch | 1 | 2 | — | — | — | — | — | — | — | — | — | — | |
Branch if Carry | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if greater than or equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if unsigned greater than or equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if greater than | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if unsigned greater than | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if less than or equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if unsigned less than or equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if less than | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if unsigned less than | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if Negative | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if Not Carry | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if Not Negative | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if Not Overflow | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if Not Zero | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if accumulator A overflow | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if accumulator B overflow | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if Overflow | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if accumulator A saturated | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if accumulator B saturated | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Branch if Zero | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
BREAK | Stop user code execution | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
BSET | Bit Set f | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — |
Bit Set Ws | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
BSW | Write C or Z bit to Ws<Wb> | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — |
Write C or Z bit to Ws<Wb> | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
BTG | Bit Toggle f | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — |
Bit Toggle Ws | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
BTST | Bit Test f | 0.5/1 | 1 | ⇕ | — | — | ⇕ | — | — | — | — | — | — |
Bit Test Ws to C | 1 | 1 | ⇕ | — | — | ⇕ | — | — | — | — | — | — | |
Bit Test Ws to Z | 0.5/1 | 1 | ⇕ | — | — | ⇕ | — | — | — | — | — | — | |
Bit Test Ws<Wb> to C | 1 | 1 | ⇕ | — | — | ⇕ | — | — | — | — | — | — | |
Bit Test Ws<Wb> to Z | 1 | 1 | ⇕ | — | — | ⇕ | — | — | — | — | — | — | |
BTSTS | Bit Test then Set f | 0.5/1 | 1 | ⇕ | — | — | ⇕ | — | — | — | — | — | — |
Bit Test Ws to C then Set | 1 | 1 | ⇕ | — | — | ⇕ | — | — | — | — | — | — | |
Bit Test Ws to Z then Set | ⇕ | — | — | ⇕ | — | — | — | — | — | — | |||
CALL | Call subroutine (label < ~ 16MB) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Call subroutine (label > ~ 16MB) | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
Call indirect subroutine at address [W11] | 1 | 2 | — | — | — | — | — | — | — | — | — | — | |
CLR | f = 0x0000 | 1 | 1 | ||||||||||
Wd = 0x0000 | 1 | 1 | |||||||||||
Clear Accumulator | 0.5 | 1 | |||||||||||
CLRWDT | Clear Watchdog Timer | 0.5 | 1 | ||||||||||
COM | f = f or Wd = f | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wd = Ws | 0.5/1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
CP | Compare f with Ws | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
Compare Ws with lit13 (literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Compare Wb with lit16 (literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Compare Wb with Ws | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
CP0 | Compare f with 0x0000 | 1 | 1 | 1 | ⇕ | 0 | ⇕ | — | — | — | — | — | — |
Compare Ws with 0x0000 | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
CPB | Compare f with Ws, with borrow | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — |
Compare Wb with lit13, with borrow(literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
Compare Wb with lit16, with borrow(literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
Compare Borrow Wb with Ws | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
CBRA | Floating Point Branch if Equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — |
Floating Point Branch if Not Equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Greater Than | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Greater Than or Equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Less Than | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Less Than or Equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Ordered | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Unordered or Not Equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Unordered or Equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Unordered or Less Than or Equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Unordered or Less Than | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Unordered or Greater Than or Equal | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Unordered or Greater Than | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
Floating Point Branch if Unordered | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — | |
CTXTSWP | Swap to CPU register context defined in lit3 | 0.5 | 2 | — | — | — | — | — | — | — | — | — | — |
Swap to CPU register context defined in Wn[2:0] | 1 | 2 | — | — | — | — | — | — | — | — | — | — | |
DTB | Decrement Wn, then branch if not zero | 1 | 1(2/3) | — | — | — | — | — | — | — | — | — | — |
DEC | f = f -1 or Wnd = f -1 | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
Wd = Ws - 1 (substitute with SUB Ws,#1,Wd) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
DEC2 | f = f -2 or Wnd = f -2 | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
Wd = Ws - 2 (substitute with SUB Ws,#2,Wd) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
DISICTL | Disable interrupts at IPL <= lit3 Optionally save prior IPL threshold to Wd | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Disable interrupts at IPL <= Wns[2:0] Optionally save prior IPL threshold to Wd | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
DIVF | Interruptible Signed 16/16 or 32/16 Fractional Divide | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
DIVFL | Interruptible Signed 32/32 Fractional Divide | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
DIVS | Interruptible Signed 16/16-bit Integer Divide | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
Interruptible Signed 32/16-bit Integer Divide | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
DIVSL | Interruptible Signed 32/32 Integer Divide | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
DIVU | Interruptible Unsigned 16/16-bit Integer Divide | 1 | 1 | ⇕ | 0 | 0 | ⇕ | — | — | — | — | — | — |
Interruptible Unsigned 32/16-bit Integer Divide | 1 | 1 | ⇕ | 0 | ⇕ | ⇕ | — | — | — | — | — | — | |
DIVUL | Interruptible Unsigned 32/32 Integer Divide | 1 | 1 | ⇕ | 0 | 0 | ⇕ | — | — | — | — | — | — |
ED | Euclidean Distance | 1 | 2 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
EDAC | Euclidean Distance Accumulate | 1 | 2 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
EXCH | Swap Wns with Wnd | 1 | 2 | — | — | — | — | — | — | — | — | — | — |
FBCL | Find Bit Change from Left (MSb) Side | 1 | 1 | ⇕ | — | — | — | — | — | — | — | — | — |
FF1L | Find First One from Left (MSb) Side | 1 | 1 | ⇕ | — | — | — | — | — | — | — | — | — |
FF1R | Find First One from Right (LSb) Side | 1 | 1 | ⇕ | — | — | — | — | — | — | — | — | — |
FLIM | Force Data (Upper and Lower) Range Limit without Limit Excess Result | 1 | 1 | — | ⇕ | 0 | ⇕ | — | — | — | — | — | — |
Force Data (Upper and Lower) Range Limit with Limit Excess Flag (Wd = -1) | 1 | 2 | — | ⇕ | 0 | ⇕ | — | — | — | — | — | — | |
Force Data (Upper and Lower) Range Limit with Limit Excess Result | 1 | 2 | — | ⇕ | 0 | ⇕ | — | — | — | — | — | — | |
GOTO | Go to address (address < ~ 16MB) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Go to address (address > ~ 16MB) | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
Go to indirect address at [W11] | 1 | 2 | — | — | — | — | — | — | — | — | — | — | |
INC | f = f + 1 or Wnd = f + 1 | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
Wd = Ws + 1 (substitute with ADD Ws,#1,Wd) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
INC2 | f = f + 2 or Wnd = f + 2 | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
Wd = Ws +2 (substitute with ADD Ws,#2,Wd) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
IOR | f = f .IOR. Wn or Wn = f .IOR. Wn | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wn = Wn .IOR. lit16 | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
Wd = Wb .IOR. Ws | 0.5/1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
Wd = Wb .IOR. lit7 | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
LAC | Load Accumulator (16/32-bit), literal shift | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
LLAC | Load Lower (LS-word of) Accumulator (32-bit), literal shift | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
LUAC | Load Upper (LS-byte) of Accumulator (32-bit), literal shift | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
LNK | Link frame pointer | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Link frame pointer (literal < 128) | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — | |
LSR | f = Logical Right Shift f by 1 or Wd = Logical Right Shift f by 1 | 1 | 1 | ⇕ | 0 | — | ⇕ | — | — | — | — | — | — |
Wd = Logical Right Shift Ws by 1 | 0.5/1 | 1 | ⇕ | 0 | — | ⇕ | — | — | — | — | — | — | |
Wnd = Logical Right Shift Ws by Wns | 0.5/1 | 1 | ⇕ | 0 | — | ⇕ | — | — | — | — | — | — | |
Wnd = Logical Right Shift Ws by lit5 | 0.5/1 | 1 | ⇕ | 0 | — | ⇕ | — | — | — | — | — | — | |
LSRM | Wnd = Logical Right Shift Ws by lit5, then logically OR with next LS-word | 1 | 2 | ⇕ | 0 | — | ⇕ | — | — | — | — | — | — |
Wnd = Logical Right Shift Ws by Wb, then logically OR with next LS-word | 1 | 2 | ⇕ | 0 | — | ⇕ | — | — | — | — | — | — | |
MAC | Multiply and Accumulate | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
MAX | Force Data Maximum Range Limit | 1 | 1 | — | 0 | 0 | ⇕ | — | — | — | — | — | — |
Force Data Maximum Range Limit | 0.5 | 1 | — | 0 | 0 | ⇕ | — | — | — | — | — | — | |
Force Data Maximum Range Limit with Result | 1 | 2 | — | 0 | 0 | ⇕ | — | — | — | — | — | — | |
MIN | Force Data Minimum Range Limit | 1 | 1 | — | ⇕ | 0 | ⇕ | — | — | — | — | — | — |
Force Data Minimum Range Limit | 0.5 | 1 | — | ⇕ | 0 | ⇕ | — | — | — | — | — | — | |
Force Data Minimum Range Limit with Result | 1 | 2 | — | ⇕ | 0 | ⇕ | — | — | — | — | — | — | |
MOV | Move Ws to Wd | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — |
Move coprocessor register to Wd | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move Ws to coprocessor register | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move 32-bit unsigned literal to Wnd | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
Move 8/16/24-bit unsigned literal to Wnd; 0 extend to 32-bits | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move 32-bit unsigned literal to co-processor register | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
Move from system stack with literal offset to Wnd using SP or FP | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move from Wns to system stack with literal offset using SP or FP | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move f to Wnd (Word or Long Word only) (f < ~1MB) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move f to Wnd (f > ~ 1MB) | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
Move f to Wnd (Byte) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move Wns to f (Word or Long Word only) (f < ~1MB) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move Wns to f (f > ~ 1MB) | 2 | 2 | — | — | — | — | — | — | — | — | — | — | |
Move Wns to f (Byte) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move [Wns+Slit12/13/14] to Wnd (Slitxx size varies with data width) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move [Wns+Slit14] to Fd | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move Wns to [Wnd+Slit12/13/14] (Slitxx size varies with data width) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
Move Fs to [Wnd+Slit14] | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
MOVIF | If SR.Z = 1 Move Wb to Wd Else Move Wns to Wd | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MOVR | Move Ws to Wd with destination Bit Reversed addressing | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MOVS.l | Move signed extended 16-bit literal to Wd | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MOVS.w | Move 16-bit literal to Wd; sign extend to 32-bits if register direct mode. | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MOVS.b | Move 8-bit literal to Wd; no extension. | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MPY | Multiply Wm by Wn to Accumulator | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
MPYN | -(Multiply Wm by Wn) to Accumulator | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
MSC | Multiply and Subtract from Accumulator | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
MUL | W2 = f * Wn | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MULFSS | Fractional: Acc(A or B) = signed(Wb) * signed(Ws) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MULFSU | Fractional: Acc(A or B) = signed(Wb) * unsigned(Ws) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MULFUS | Fractional: Acc(A or B) = unsigned(Wb) * signed(Ws) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MULFUU | Fractional: Acc(A or B) = unsigned(Wb) * unsigned(Ws) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
MULISS | Integer: Acc(A or B) = signed(Wb) * signed(Ws) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Integer: Acc(A or B) = signed(Wb) * signed(slit8) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
MULISU | Integer: Acc(A or B) = signed(Wb) * unsigned(Ws) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Integer: Acc(A or B) = signed(Wb) * unsigned(lit8) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
MULIUS | Integer: Acc(A or B) = unsigned(Wb) * signed(Ws) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Integer: Acc(A or B) = unsigned(Wb) * signed(slit8) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
MULIUU | Integer: Acc(A or B) = unsigned(Wb) * unsigned(Ws) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Integer: Acc(A or B) = unsigned(Wb) * unsigned(lit8) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
MULSS | {Wd}=signed(Wb) * signed(Ws) | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — |
{Wd}=signed(Wb) * signed(slit8) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
MULSU | {Wd}=signed(Wb) * unsigned(Ws) | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — |
{Wd}=signed(Wb) * unsigned(lit8) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
MULUS | {Wd}=unsigned(Wb) * signed(Ws) | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — |
{Wd}=unsigned(Wb) * signed(slit8) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
MULUU | {Wd}=unsigned(Wb) * unsigned(Ws) | 0.5/1 | 1 | — | — | — | — | — | — | — | — | — | — |
{Wd}=unsigned(Wb) * unsigned(lit8) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
NEG | Negate Accumulator | 0.5 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
f = f+ 1 or Wd = f + 1 | 1 | 1 | ⇕ | 0 | ⇕ | ⇕ | — | — | — | — | — | — | |
Wd = Ws + 1 | 0.5/1 | 1 | ⇕ | 0 | ⇕ | ⇕ | — | — | — | — | — | — | |
NEOP | None executable NOP (16-bit instruction pad) | 0.5 | 0 | — | — | — | — | — | — | — | — | — | — |
NOP | No Operation | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
No Operation | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
NORM | Normalize Accumulator | 1 | 1 | — | ⇕ | — | ⇕ | 0 | 0 | — | — | — | — |
POP | Pop f from top of stack (TOS) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Pop Wnd Register from system stack. | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — | |
Pop Fd Register from system stack. | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — | |
PUSH | Push f to top of stack (TOS) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Push Wns Register to system stack | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — | |
Push Fs Register to system stack | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — | |
PWRSAV | Go into standby mode | 0.5 | 2 | — | — | — | — | — | — | — | — | — | — |
RCALL | Relative Call | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Computed Call | 1 | 2 | — | — | — | — | — | — | — | — | — | — | |
REPEAT | Repeat Next Instruction lit15+1 times | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Repeat Next Instruction lit5+1 times | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — | |
Repeat Next Instruction (Wn)+1 times | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
RESET | Software device RESET | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
RETFIE | Return from interrupt enable | 0.5 | 4 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
RETLW | Return from Subroutine with literal in Wn | 1 | 3 | — | — | — | — | — | — | — | — | — | — |
RETURN | Return from Subroutine | 0.5 | 3 | — | — | — | — | — | — | — | — | — | — |
RLC | f = Rotate Left through Carry f or Wd = Rotate Left through Carry f | 1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wd = Rotate Left through Carry Ws | 0.5/1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — | |
RLNC | f = Rotate Left (No Carry) f or Wd = Rotate Left (No Carry) f | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wd = Rotate Left (No Carry) Ws | 0.5/1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
RRC | f = Rotate Right through Carry f or Wd = Rotate Right through Carry f | 1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wd = Rotate Right through Carry Ws | 0.5/1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — | |
RRNC | f = Rotate Right (No Carry) f or Wd = Rotate Right (No Carry) f | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wd = Rotate Right (No Carry) Ws | 0.5/1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
SAC | Store Accumulator (16/32-bit) | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
SACR | Store Rounded Accumulator (16/32-bit), literal shift | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Store Rounded Accumulator (16/32-bit), Wb shift | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
SLAC | Store Lower (LS-Word of) Accumulator (32-bit), literal shift | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
SUAC | Store sign extended Upper (MS-Byte of) Accumulator (32-bit), literal shift | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
SE | Wd = sign-extended Ws | 0.5/1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — |
SETM | f = 0xFFFF | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
Wd = 0xFFFF (substitute with MOVS #0xFFFF, Wd) | 1 | 1 | — | — | — | — | — | — | — | — | — | — | |
SFTAC | Arithmetic Shift Accumulator by (Wn) | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
Arithmetic Shift Accumulator by Slit7 | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ | |
SL | f = Left Shift f by 1 or Wd = Left Shift f by 1 | 1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wd = Left Shift Ws by 1 | 0.5/1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — | |
Wnd = Left Shift Wb by Wns | 0.5/1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — | |
Wnd = Left Shift Ws by lit5 | 0.5/1 | 1 | ⇕ | ⇕ | — | ⇕ | — | — | — | — | — | — | |
SLM | Wnd = Left Shift Wb by lit5, then logically OR with next MS-word | 1 | 2 | — | — | — | ⇓ | — | — | — | — | — | — |
Wnd = Left Shift Wb by Wb, then logically OR with next MS-word | 1 | 2 | — | — | — | ⇓ | — | — | — | — | — | — | |
SQR | Square to Accumulator | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
SQRAC | Square and Accumulate | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
SQRN | Negated Square to Accumulator | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
SQRSC | Square and Subtract from Accumulator | 1 | 1 | — | — | — | — | ⇕ | ⇕ | ⇑ | ⇑ | ⇕ | ⇑ |
SSTEP | Single step | 1 | 5 | — | — | — | — | — | — | — | — | — | — |
SUB | Subtract Accumulators | 0.5 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
f = f - Wn or Wn = f - Wn | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Wn = Wn - lit5 | 0.5 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Wn = Wn - lit16 | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Wd = Wb - Ws | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Wd = Ws - lit7 (literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
16-bit Signed Subtract from Accumulator | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
SUBB | f = f - Wn - (C) or Wn = f - Wn - (C) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — |
Wn = Wn - lit16 - (C) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
Wd = Wb - Ws - (C) | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
Wd = Ws - lit7 - (C) (literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
SUBR | f = Wn - f or Wn = Wn - f | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — |
Wd = Ws - Wb | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
Wd = lit7 - Ws (literal zero-extended) | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | |
SUBBR | f = Wn - f - (C) or Wn = Wn -f - (C) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — |
Wd = Ws - Wb - (C) | 0.5/1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
Wd = lit7 - Ws - (C) (literal zero-extended) | 1 | 1 | ⇕ | ⇕ | ⇕ | ⇓ | — | — | — | — | — | — | |
SWAP | Wn = Word or byte swap Wn | 1 | 1 | — | — | — | — | — | — | — | — | — | — |
TST | Test f | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — |
Test f and move f to Wnd | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
UFEX | Execute op(s) in FEX2:FEX in Mission | 1 | 5 | — | — | — | — | — | — | — | — | — | — |
ULNK | Unlink frame pointer | 0.5 | 1 | — | — | — | — | — | — | — | — | — | — |
URUN | Switch from debug PC to user PC | 1 | 3 | — | — | — | — | — | — | — | — | — | — |
XOR | f = f .XOR. Wn or Wn = f .XOR. Wn | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — |
Wn = Wn .XOR. lit16 | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
Wd = Wb .XOR. Ws | 0.5/1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
Wd = Wb .XOR. lit7 (literal zero-extended) | 1 | 1 | — | ⇕ | — | ⇕ | — | — | — | — | — | — | |
ZE | Wd = Zero-extend Ws | 0.5/1 | 1 | 1 | 0 | — | ⇕ | — | — | — | — | — | — |
Instruction2: Description | Cycle Count | FPU Status Register (FSR) | ||||||||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
FSR[28:24] | FSR[19:16] | FSR[6:0] | ||||||||||||||||
SUB | INF | FN | FZ | FNA N | GT | LT | EQ | UN | SUBO | HUGI | INX | UDF | OVF | DIV0 | INVAL | |||
Move instructions | ||||||||||||||||||
MOV: Move (Wns+offset) to Fd | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
MOV: Move Fs to (Wnd+offset) | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
MOV: Move (Ws) to Fd or FSR or FCR or FEAR | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
MOV: Move Fs or FSR or FCR or FEAR to (Wd) | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
MOV: Move 32-bit literal value into Fd or FSR or FCR | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
PUSH: Push Fs or FSR or FCR or FSRH to system stack | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
POP: Pop Fd or FSR or FCR from system stack | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
MOV{.s, .d}: Move Fs to Fd | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
MOVC{.s, .d}: Load constant value into Fd | 1 | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | |
Status Bit Set/Clear/Update Instructions | ||||||||||||||||||
AND: Clear bit(s) in active FP special reg, bits specified by literal value. | 1 | — | — | — | — | — | — | — | — | — | ⇓ | ⇓ | ⇓ | ⇓ | ⇓ | ⇓ | ⇓ | |
IOR: Set bit(s) in active FP special reg, bits specified by literal value. | 1 | — | — | — | — | — | — | — | — | — | ⇑ | ⇑ | ⇑ | ⇑ | ⇑ | ⇑ | ⇑ | |
TST{.s, .d}: Test (inspect) Fs and update FSR accordingly. | 1 | ⇕ | ⇕ | ⇕ | ⇕ | ⇕ | — | — | — | — | — | — | — | — | — | — | — | |
Conversion Instructions | ||||||||||||||||||
LI2F{.s, .d}: Convert 32-bit Integer Fs to FP in Fd | 1 | — | — | — | — | — | — | — | — | — | 0 | 0 | ⇕ | 0 | 0 | 0 | 0 | |
DI2F{.s, .d}: Convert 64-bit Integer Fs to FP in Fd | 1 | — | — | — | — | — | — | — | — | — | 0 | 0 | ⇕ | 0 | 0 | 0 | 0 | |
F2LI{.s, .d}: Convert FP Fs to 32-bit Integer in Fd | 1 for SP 2 for DP | — | — | — | — | — | — | — | — | — | ⇕ | ⇕ | ⇕ | 0 | 0 | 0 | ⇕ | |
F2DI{.s, .d}: Convert FP Fs to 64-bit Integer in Fd |
1 for SP 2 for DP | — | — | — | — | — | — | — | — | — | ⇕ | ⇕ | ⇕ | 0 | 0 | 0 | ⇕ | |
Comparison Instructions | ||||||||||||||||||
CPS{.s, .d}: FP Compare (Fb - Fs) with signaling exceptions | 1 | — | — | — | — | — | ⇕ | ⇕ | ⇕ | ⇕ | ⇕ | 0 | 0 | 0 | 0 | 0 | ⇕ | |
CPQ{.s, .d}: FP Compare (Fb - Fs) with quiet signaling exceptions | 1 | — | — | — | — | — | ⇕ | ⇕ | ⇕ | ⇕ | ⇕ | 0 | 0 | 0 | 0 | 0 | ⇕ | |
FLIM{.s, .d}: Clamp Fd to limits specified by Fb and Fs | 1 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | 0 | 0 | 0 | 0 | ⇕ | |
MAX{.s, .d}: Maximum of Fb or Fs moved to Fd: IEEE 754-2019 maximumNum-ber(x,y) | 1 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | 0 | 0 | 0 | 0 | ⇕ | |
MAXNUM{.s, .d}: Maximum of Fb or Fs moved to Fd: IEEE 754-2019 maximum(x,y) | 1 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | 0 | 0 | 0 | 0 | ⇕ | |
MIN{.s, .d}: Minimum of Fb or Fs moved to Fd: IEEE 754-2019 minimumNumber(x,y) | 1 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | 0 | 0 | 0 | 0 | ⇕ | |
MINNUM{.s, .d}: Minimum of Fb or Fs moved to Fd: IEEE 754-2019 minimum(x,y) | 1 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | 0 | 0 | 0 | 0 | ⇕ | |
Math Instructions | ||||||||||||||||||
ADD{.s, .d}: Add: Fb + Fs, | 2 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | ⇕ | ⇕ | ⇕ | 0 | ⇕ | |
SUB{.s, .d}: Subtract: Fb - Fs, | 2 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | ⇕ | ⇕ | ⇕ | 0 | ⇕ | |
NEG{.s, .d}: Negate: -1 x Fs, | 1 | — | — | — | — | — | — | — | — | — | ⇕ | — | — | — | — | — | — | |
ABS{.s, .d}: Absolute value of Fs, | 1 | — | — | — | — | — | — | — | — | — | ⇕ | — | — | — | — | — | — | |
MUL{.s, .d}:Multiply: Fb x Fs | 3 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | ⇕ | ⇕ | ⇕ | 0 | ⇕ | |
MAC{.s, .d}: Multiply and Accumulate: Fd = Fd + Fb x Fs | 3 for SP 4 for DP | — | — | — | — | — | — | — | — | — | ⇕ | 0 | ⇕ | ⇕ | ⇕ | 0 | ⇕ | |
DIV{.s, .d}: Divide: Fb ÷ Fs, |
11 for SP 32 for DP | — | — | — | — | — | — | — | — | — | ⇕ | 0 | ⇕ | ⇕ | ⇕ | ⇕ | ⇕ | |
SQRT{.s, .d}: Square Root of Fs, |
10 for SP 13 for DP | — | — | — | — | — | — | — | — | — | ⇕ | 0 | ⇕ | 0 | 0 | 0 | ⇕ | |
SIN{.s}: Calculate Sine of Fs (radians), | 4 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | ⇕ | ⇕ | 0 | 0 | ⇕ | |
COS{.s}: Calculate Cosine of Fs (radians), result in Fd | 4 | — | — | — | — | — | — | — | — | — | ⇕ | 0 | ⇕ | ⇕ | 0 | 0 | ⇕ | |
Branch Instructions | ||||||||||||||||||
FBRA cc: PC branch based on FPU compare status bits. | 1 for backward branch (2 or 3) for forward branch | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — | — |
- ⇕ set or cleared, ‘1’ always set, ‘0’ always cleared, — unchanged
- ⇓ may be cleared but never set (sticky), ⇑ may be set but never cleared (sticky)Note: SA and/or SB only modified if corresponding saturation bit is enabled, otherwise unchanged.
- ⇕ set or cleared, ‘1’ always set, ‘0’ always cleared, — unchanged
- ⇓ may be cleared but never set (sticky), ⇑ may be set but never cleared (sticky)Note: SA and/or SB only modified if corresponding saturation bit is enabled, otherwise unchanged.