6.2 Instruction Set Summary Table

The complete 16-bit DSC device instruction set is summarized in Table 6-1. This table contains an alphabetized listing of the instruction set. It includes instruction assembly syntax, description, size (in 24-bit words), execution time (in instruction cycles), affected Status bits and the page number where the detailed description can be found. The dsPIC33A CPU Instruction Status Flag Operations section identifies the symbols that are used in the Table 6-1.

Table 6-1. Instruction Set Summary Table
Assembly Mnemonic1DescriptionWordsCyclesCNOVZOAOBSASB(1)OABSAB(1)
ADDf + Wn or Wn = f + Wn11
Wn = Wn + lit50.51
Wn = Wn + lit1611
Wd = Wb + Ws0.5/11
Wd = Wb + lit7 (literal zero-extended)11
Add Accumulators0.51
16-bit Signed Add to Accumulator11
ADDCf = f + Wn + (C) or Wn = f + Wn + (C)11
Wn = Wn + lit16 + (C)11
Wd = Wb + Ws + (C) 0.5/1 1
Wd = Wb + lit7 + (C) (literal zero-extended)11
ANDf = f .AND. Wn or Wn = f .AND. Wn11
Wn = Wn .AND. lit1611
Wd = Wb .AND. Ws0.5/11
Wd = Wb .AND. lit7 (literal zero-extended)11
AND1Wd = Wb .AND. lit7 (literal ones-extended)11
ASRf = Arithmetic Right Shift f by 1 or Wn = Arithmetic Right Shift f by 111
Wd = Arithmetic Right Shift Ws by 10.5/11
Wnd = Arithmetic Right Shift Ws by Wb0.5/11
Wnd = Arithmetic Right Shift Ws by lit50.5/11
ASRMWnd = Arithmetic Right Shift Ws by lit5, then logically OR with next LS-word12
Wnd = Arithmetic Right Shift Ws by Wb, then logically OR with next LS-word12
BCLRBit Clear f11
Bit Clear Ws0.5/11
BFEXTBit Field Extract from Ws to Wb11
Bit Field Extract from f to Wb22
BFINSBit Field Insert from Wb into Ws11
Bit Field Insert from Wb into f22
Bit Field Insert lit8 into Ws22
BOOTSWPSwap Active and Inactive address space12
BRABranch Unconditionally11
Computed Branch12
Branch if Carry11(2/3)
Branch if greater than or equal11(2/3)
Branch if unsigned greater than or equal11(2/3)
Branch if greater than11(2/3)
Branch if unsigned greater than11(2/3)
Branch if less than or equal11(2/3)
Branch if unsigned less than or equal11(2/3)
Branch if less than11(2/3)
Branch if unsigned less than11(2/3)
Branch if Negative11(2/3)
Branch if Not Carry11(2/3)
Branch if Not Negative11(2/3)
Branch if Not Overflow11(2/3)
Branch if Not Zero11(2/3)
Branch if accumulator A overflow11(2/3)
Branch if accumulator B overflow11(2/3)
Branch if Overflow11(2/3)
Branch if accumulator A saturated11(2/3)
Branch if accumulator B saturated11(2/3)
Branch if Zero11(2/3)
BREAKStop user code execution11
BSETBit Set f0.5/11
Bit Set Ws11
BSWWrite C or Z bit to Ws<Wb>0.5/11
Write C or Z bit to Ws<Wb>11
BTGBit Toggle f0.5/11
Bit Toggle Ws11
BTSTBit Test f0.5/11
Bit Test Ws to C11
Bit Test Ws to Z0.5/11
Bit Test Ws<Wb> to C11
Bit Test Ws<Wb> to Z11
BTSTSBit Test then Set f0.5/11
Bit Test Ws to C then Set11
Bit Test Ws to Z then Set
CALLCall subroutine (label < ~ 16MB)11
Call subroutine (label > ~ 16MB)22
Call indirect subroutine at address [W11]12
CLRf = 0x000011
Wd = 0x000011
Clear Accumulator0.51
CLRWDTClear Watchdog Timer0.51
COMf = f or Wd = f11
Wd = Ws0.5/11
CPCompare f with Ws11
Compare Ws with lit13 (literal zero-extended)11
Compare Wb with lit16 (literal zero-extended)11
Compare Wb with Ws0.5/11
CP0Compare f with 0x00001110
Compare Ws with 0x000011
CPBCompare f with Ws, with borrow11
Compare Wb with lit13, with borrow(literal zero-extended)11
Compare Wb with lit16, with borrow(literal zero-extended)11
Compare Borrow Wb with Ws0.5/11
CBRAFloating Point Branch if Equal11(2/3)
Floating Point Branch if Not Equal11(2/3)
Floating Point Branch if Greater Than11(2/3)
Floating Point Branch if Greater Than or Equal11(2/3)
Floating Point Branch if Less Than11(2/3)
Floating Point Branch if Less Than or Equal11(2/3)
Floating Point Branch if Ordered11(2/3)
Floating Point Branch if Unordered or Not Equal11(2/3)
Floating Point Branch if Unordered or Equal11(2/3)
Floating Point Branch if Unordered or Less Than or Equal11(2/3)
Floating Point Branch if Unordered or Less Than11(2/3)
Floating Point Branch if Unordered or Greater Than or Equal11(2/3)
Floating Point Branch if Unordered or Greater Than11(2/3)
Floating Point Branch if Unordered11(2/3)
CTXTSWPSwap to CPU register context defined in lit30.52
Swap to CPU register context defined in Wn[2:0]12
DTBDecrement Wn, then branch if not zero11(2/3)
DECf = f -1 or Wnd = f -111
Wd = Ws - 1 (substitute with SUB Ws,#1,Wd)11
DEC2f = f -2 or Wnd = f -211
Wd = Ws - 2 (substitute with SUB Ws,#2,Wd)11
DISICTLDisable interrupts at IPL <= lit3 Optionally save prior IPL threshold to Wd11
Disable interrupts at IPL <= Wns[2:0] Optionally save prior IPL threshold to Wd11
DIVFInterruptible Signed 16/16 or 32/16 Fractional Divide11
DIVFLInterruptible Signed 32/32 Fractional Divide11
DIVSInterruptible Signed 16/16-bit Integer Divide11
Interruptible Signed 32/16-bit Integer Divide11
DIVSLInterruptible Signed 32/32 Integer Divide11
DIVUInterruptible Unsigned 16/16-bit Integer Divide1100
Interruptible Unsigned 32/16-bit Integer Divide110
DIVULInterruptible Unsigned 32/32 Integer Divide1100
EDEuclidean Distance12
EDACEuclidean Distance Accumulate12
EXCHSwap Wns with Wnd12
FBCLFind Bit Change from Left (MSb) Side11
FF1LFind First One from Left (MSb) Side11
FF1RFind First One from Right (LSb) Side11
FLIMForce Data (Upper and Lower) Range Limit without Limit Excess Result110
Force Data (Upper and Lower) Range Limit with Limit Excess Flag (Wd = -1)120
Force Data (Upper and Lower) Range Limit with Limit Excess Result120
GOTOGo to address (address < ~ 16MB)11
Go to address (address > ~ 16MB)22
Go to indirect address at [W11]12
INCf = f + 1 or Wnd = f + 111
Wd = Ws + 1 (substitute with ADD Ws,#1,Wd)11
INC2f = f + 2 or Wnd = f + 211
Wd = Ws +2 (substitute with ADD Ws,#2,Wd)11
IORf = f .IOR. Wn or Wn = f .IOR. Wn11
Wn = Wn .IOR. lit1611
Wd = Wb .IOR. Ws0.5/11
Wd = Wb .IOR. lit711
LACLoad Accumulator (16/32-bit), literal shift11
LLACLoad Lower (LS-word of) Accumulator (32-bit), literal shift11
LUACLoad Upper (LS-byte) of Accumulator (32-bit), literal shift11
LNKLink frame pointer11
Link frame pointer (literal < 128)0.51
LSRf = Logical Right Shift f by 1 or Wd = Logical Right Shift f by 1110
Wd = Logical Right Shift Ws by 10.5/110
Wnd = Logical Right Shift Ws by Wns0.5/110
Wnd = Logical Right Shift Ws by lit50.5/110
LSRMWnd = Logical Right Shift Ws by lit5, then logically OR with next LS-word120
Wnd = Logical Right Shift Ws by Wb, then logically OR with next LS-word120
MACMultiply and Accumulate11
MAXForce Data Maximum Range Limit1100
Force Data Maximum Range Limit0.5100
Force Data Maximum Range Limit with Result1200
MINForce Data Minimum Range Limit110
Force Data Minimum Range Limit0.510
Force Data Minimum Range Limit with Result120
MOVMove Ws to Wd0.5/11
Move coprocessor register to Wd0.5/11
Move Ws to coprocessor register0.5/11
Move 32-bit unsigned literal to Wnd22
Move 8/16/24-bit unsigned literal to Wnd; 0 extend to 32-bits11
Move 32-bit unsigned literal to co-processor register22
Move from system stack with literal offset to Wnd using SP or FP0.51
Move from Wns to system stack with literal offset using SP or FP0.51
Move f to Wnd (Word or Long Word only) (f < ~1MB)11
Move f to Wnd (f > ~ 1MB)22
Move f to Wnd (Byte)11
Move Wns to f (Word or Long Word only) (f < ~1MB)11
Move Wns to f (f > ~ 1MB)22
Move Wns to f (Byte)11
Move [Wns+Slit12/13/14] to Wnd (Slitxx size varies with data width)11
Move [Wns+Slit14] to Fd11
Move Wns to [Wnd+Slit12/13/14] (Slitxx size varies with data width)11
Move Fs to [Wnd+Slit14]11
MOVIFIf SR.Z = 1 Move Wb to Wd Else Move Wns to Wd11
MOVRMove Ws to Wd with destination Bit Reversed addressing11
MOVS.lMove signed extended 16-bit literal to Wd11
MOVS.wMove 16-bit literal to Wd; sign extend to 32-bits if register direct mode.11
MOVS.bMove 8-bit literal to Wd; no extension.11
MPYMultiply Wm by Wn to Accumulator11
MPYN-(Multiply Wm by Wn) to Accumulator11
MSCMultiply and Subtract from Accumulator11
MULW2 = f * Wn11
MULFSSFractional: Acc(A or B) = signed(Wb) * signed(Ws)11
MULFSUFractional: Acc(A or B) = signed(Wb) * unsigned(Ws)11
MULFUSFractional: Acc(A or B) = unsigned(Wb) * signed(Ws)11
MULFUUFractional: Acc(A or B) = unsigned(Wb) * unsigned(Ws)11
MULISSInteger: Acc(A or B) = signed(Wb) * signed(Ws)11
Integer: Acc(A or B) = signed(Wb) * signed(slit8)11
MULISUInteger: Acc(A or B) = signed(Wb) * unsigned(Ws)11
Integer: Acc(A or B) = signed(Wb) * unsigned(lit8)11
MULIUSInteger: Acc(A or B) = unsigned(Wb) * signed(Ws)11
Integer: Acc(A or B) = unsigned(Wb) * signed(slit8)11
MULIUUInteger: Acc(A or B) = unsigned(Wb) * unsigned(Ws)11
Integer: Acc(A or B) = unsigned(Wb) * unsigned(lit8)11
MULSS{Wd}=signed(Wb) * signed(Ws)0.5/11
{Wd}=signed(Wb) * signed(slit8)11
MULSU{Wd}=signed(Wb) * unsigned(Ws)0.5/11
{Wd}=signed(Wb) * unsigned(lit8)11
MULUS{Wd}=unsigned(Wb) * signed(Ws)0.5/11
{Wd}=unsigned(Wb) * signed(slit8)11
MULUU{Wd}=unsigned(Wb) * unsigned(Ws)0.5/11
{Wd}=unsigned(Wb) * unsigned(lit8)11
NEGNegate Accumulator0.51
f = f+ 1 or Wd = f + 1110
Wd = Ws + 1 0.5/110
NEOPNone executable NOP (16-bit instruction pad)0.50
NOPNo Operation11
No Operation11
NORMNormalize Accumulator1100
POPPop f from top of stack (TOS)11
Pop Wnd Register from system stack.0.51
Pop Fd Register from system stack.0.51
PUSHPush f to top of stack (TOS)11
Push Wns Register to system stack0.51
Push Fs Register to system stack0.51
PWRSAVGo into standby mode0.52
RCALLRelative Call11
Computed Call12
REPEATRepeat Next Instruction lit15+1 times11
Repeat Next Instruction lit5+1 times0.51
Repeat Next Instruction (Wn)+1 times11
RESETSoftware device RESET11
RETFIEReturn from interrupt enable0.54
RETLWReturn from Subroutine with literal in Wn13
RETURNReturn from Subroutine0.53
RLCf = Rotate Left through Carry f or Wd = Rotate Left through Carry f11
Wd = Rotate Left through Carry Ws0.5/11
RLNCf = Rotate Left (No Carry) f or Wd = Rotate Left (No Carry) f11
Wd = Rotate Left (No Carry) Ws0.5/11
RRCf = Rotate Right through Carry f or Wd = Rotate Right through Carry f11
Wd = Rotate Right through Carry Ws0.5/11
RRNCf = Rotate Right (No Carry) f or Wd = Rotate Right (No Carry) f11
Wd = Rotate Right (No Carry) Ws0.5/11
SACStore Accumulator (16/32-bit)11
SACRStore Rounded Accumulator (16/32-bit), literal shift11
Store Rounded Accumulator (16/32-bit), Wb shift11
SLACStore Lower (LS-Word of) Accumulator (32-bit), literal shift11
SUACStore sign extended Upper (MS-Byte of) Accumulator (32-bit), literal shift11
SEWd = sign-extended Ws0.5/11
SETMf = 0xFFFF11
Wd = 0xFFFF (substitute with MOVS #0xFFFF, Wd)11
SFTACArithmetic Shift Accumulator by (Wn)11
Arithmetic Shift Accumulator by Slit711
SLf = Left Shift f by 1 or Wd = Left Shift f by 111
Wd = Left Shift Ws by 10.5/11
Wnd = Left Shift Wb by Wns0.5/11
Wnd = Left Shift Ws by lit50.5/11
SLMWnd = Left Shift Wb by lit5, then logically OR with next MS-word12
Wnd = Left Shift Wb by Wb, then logically OR with next MS-word12
SQRSquare to Accumulator11
SQRACSquare and Accumulate11
SQRNNegated Square to Accumulator11
SQRSCSquare and Subtract from Accumulator11
SSTEPSingle step15
SUBSubtract Accumulators0.51
f = f - Wn or Wn = f - Wn11
Wn = Wn - lit50.51
Wn = Wn - lit1611
Wd = Wb - Ws0.5/11
Wd = Ws - lit7 (literal zero-extended)11
16-bit Signed Subtract from Accumulator11
SUBBf = f - Wn - (C) or Wn = f - Wn - (C)11
Wn = Wn - lit16 - (C)11
Wd = Wb - Ws - (C)0.5/11
Wd = Ws - lit7 - (C) (literal zero-extended)11
SUBRf = Wn - f or Wn = Wn - f11
Wd = Ws - Wb0.5/11
Wd = lit7 - Ws (literal zero-extended)0.5/11
SUBBRf = Wn - f - (C) or Wn = Wn -f - (C)11
Wd = Ws - Wb - (C)0.5/11
Wd = lit7 - Ws - (C) (literal zero-extended)11
SWAPWn = Word or byte swap Wn11
TSTTest f11
Test f and move f to Wnd11
UFEXExecute op(s) in FEX2:FEX in Mission15
ULNKUnlink frame pointer0.51
URUNSwitch from debug PC to user PC13
XORf = f .XOR. Wn or Wn = f .XOR. Wn11
Wn = Wn .XOR. lit1611
Wd = Wb .XOR. Ws0.5/11
Wd = Wb .XOR. lit7 (literal zero-extended)11
ZEWd = Zero-extend Ws0.5/1110
Table 6-2. FPU Instruction Set Summary
Instruction2: DescriptionCycle CountFPU Status Register (FSR)
FSR[28:24]FSR[19:16]FSR[6:0]
SUBINFFNFZFNA NGTLTEQUNSUBOHUGIINXUDFOVFDIV0INVAL
Move instructions
MOV: Move (Wns+offset) to Fd1
MOV: Move Fs to (Wnd+offset)1
MOV: Move (Ws) to Fd or FSR or FCR or FEAR1
MOV: Move Fs or FSR or FCR or FEAR to (Wd)1
MOV: Move 32-bit literal value into Fd or FSR or FCR1
PUSH: Push Fs or FSR or FCR or FSRH to system stack1
POP: Pop Fd or FSR or FCR from system stack1
MOV{.s, .d}: Move Fs to Fd1
MOVC{.s, .d}: Load constant value into Fd1
Status Bit Set/Clear/Update Instructions
AND: Clear bit(s) in active FP special reg, bits specified by literal value.1
IOR: Set bit(s) in active FP special reg, bits specified by literal value.1
TST{.s, .d}: Test (inspect) Fs and update FSR accordingly.1
Conversion Instructions
LI2F{.s, .d}: Convert 32-bit Integer Fs to FP in Fd1000000
DI2F{.s, .d}: Convert 64-bit Integer Fs to FP in Fd1000000
F2LI{.s, .d}: Convert FP Fs to 32-bit Integer in Fd

1 for SP

2 for DP

000
F2DI{.s, .d}: Convert FP Fs to 64-bit Integer in Fd

1 for SP

2 for DP

000
Comparison Instructions
CPS{.s, .d}: FP Compare (Fb - Fs) with signaling exceptions100000
CPQ{.s, .d}: FP Compare (Fb - Fs) with quiet signaling exceptions100000
FLIM{.s, .d}: Clamp Fd to limits specified by Fb and Fs100000
MAX{.s, .d}: Maximum of Fb or Fs moved to Fd: IEEE 754-2019 maximumNum-ber(x,y)100000
MAXNUM{.s, .d}: Maximum of Fb or Fs moved to Fd: IEEE 754-2019 maximum(x,y)100000
MIN{.s, .d}: Minimum of Fb or Fs moved to Fd: IEEE 754-2019 minimumNumber(x,y)100000
MINNUM{.s, .d}: Minimum of Fb or Fs moved to Fd: IEEE 754-2019 minimum(x,y)100000
Math Instructions
ADD{.s, .d}: Add: Fb + Fs,200
SUB{.s, .d}: Subtract: Fb - Fs,200
NEG{.s, .d}: Negate: -1 x Fs,1
ABS{.s, .d}: Absolute value of Fs,1
MUL{.s, .d}:Multiply: Fb x Fs300
MAC{.s, .d}: Multiply and Accumulate: Fd = Fd + Fb x Fs

3 for SP

4 for DP

00
DIV{.s, .d}: Divide: Fb ÷ Fs,

11 for SP

32 for DP

0
SQRT{.s, .d}: Square Root of Fs,

10 for SP

13 for DP

0000
SIN{.s}: Calculate Sine of Fs (radians),4000
COS{.s}: Calculate Cosine of Fs (radians), result in Fd4000
Branch Instructions
FBRA cc: PC branch based on FPU compare status bits.1 for backward branch (2 or 3) for forward branch
1 Legend:
  • ⇕ set or cleared, ‘1’ always set, ‘0’ always cleared, — unchanged
  • ⇓ may be cleared but never set (sticky), ⇑ may be set but never cleared (sticky)
    Note: SA and/or SB only modified if corresponding saturation bit is enabled, otherwise unchanged.
2 Legend:
  • ⇕ set or cleared, ‘1’ always set, ‘0’ always cleared, — unchanged
  • ⇓ may be cleared but never set (sticky), ⇑ may be set but never cleared (sticky)
    Note: SA and/or SB only modified if corresponding saturation bit is enabled, otherwise unchanged.