6.1 Instruction Bit Map

The CPU instruction opcode map for the dsPIC33A class of devices is shown in Figure 6-1. The map comprises 4 x 64 slot “Quadrants,” each selected by a 2-bit opcode extension bit field within the (32-bit) instruction. Each instruction has a 6-bit opcode, selecting one of 64 opcodes within a Quadrant. The 16-bit instructions do not have the extension bit field but assume use of the default Quadrant 0. New instructions are highlighted in blue text, while unused slots are grayed out. The opcode map shows the instructions defined for the FPU coprocessor in green text.

Note: The complete opcode for each instruction can be determined by the instruction descriptions in Instruction Descriptions.
Figure 6-1. Instruction Encoding