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PIC16F18054/55/74/75 Full-Featured, 28/40-Pin Microcontrollers PIC16F18054/55/74/75
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45
Appendix A: Revision History
PIC16F18054/55/74/75
Introduction
PIC16F180
Family Types
Core Features
1
Packages
2
Pin Diagrams
3
Pin Allocation Tables
4
Guidelines for Getting Started with
PIC16F180
Microcontrollers
5
Register and Bit Naming Conventions
6
Register Legend
7
Enhanced Mid-Range CPU
8
Device Configuration
9
Memory Organization
10
Resets
11
OSC - Oscillator Module
12
INT - Interrupts
13
Sleep Mode
14
WDT - Watchdog Timer
15
NVM - Nonvolatile Memory Control
16
I/O Ports
17
IOC - Interrupt-on-Change
18
PPS - Peripheral Pin Select Module
19
CRC - Cyclic Redundancy Check Module
20
TMR0 - Timer0 Module
21
TMR1 - Timer1 Module with Gate Control
22
TMR2 - Timer2 Module
23
NCO - Numerically Controlled Oscillator Module
24
CWG - Complementary Waveform Generator Module
25
CCP - Capture/Compare/PWM Module
26
Capture, Compare, and PWM Timers Selection
27
PWM - Pulse-Width Modulation
28
PWM Timers Selection
29
CLC - Configurable Logic Cell
30
MSSP - Host Synchronous Serial Port Module
31
EUSART - Enhanced Universal Synchronous Asynchronous Receiver Transmitter
32
ADC - Analog-to-Digital Converter with Computation Module
33
DAC - Digital-to-Analog Converter Module
34
CMP - Comparator Module
35
FVR - Fixed Voltage Reference
36
Temperature Indicator Module
37
ZCD - Zero-Cross Detection Module
38
Charge Pump
39
Instruction Set Summary
40
ICSP™ - In-Circuit Serial Programming™
41
Register Summary
42
Electrical Specifications
43
DC and AC Characteristics Graphs and Tables
44
Packaging Information
45
Appendix A: Revision History
The Microchip Website
Product Change Notification Service
Customer Support
Product Identification System
Microchip Devices Code Protection Feature
Legal Notice
Trademarks
Quality Management System
Worldwide Sales and Service
45 Appendix A: Revision History
Doc Rev.
Date
Comments
A
08/2021
Initial document release
