3.1 MIPI
(Ask a Question)MIPI RX Layout Guidelines:
The data and clock must be matched within 20 mils in PCB.
MIPI TX Layout Guidelines:
As shown in Figure 1, the LP and HS resistors must be close to the PolarFire SoC device pin. The HS signals should be routed to LP resistors to minimize the LP signals PCB stub length. The LP signals stub should be less than 500 mils. The data lane and clock should be length matched within 20 mils. Eight inches are the maximum length supported.
